1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2014 MediaTek Inc. 4*4882a593Smuzhiyun * Author: Eddie Huang <eddie.huang@mediatek.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 9*4882a593Smuzhiyun#include "mt8173.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "MediaTek MT8173 evaluation board"; 13*4882a593Smuzhiyun compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun aliases { 16*4882a593Smuzhiyun serial0 = &uart0; 17*4882a593Smuzhiyun serial1 = &uart1; 18*4882a593Smuzhiyun serial2 = &uart2; 19*4882a593Smuzhiyun serial3 = &uart3; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun memory@40000000 { 23*4882a593Smuzhiyun device_type = "memory"; 24*4882a593Smuzhiyun reg = <0 0x40000000 0 0x80000000>; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun chosen { }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun connector { 30*4882a593Smuzhiyun compatible = "hdmi-connector"; 31*4882a593Smuzhiyun label = "hdmi"; 32*4882a593Smuzhiyun type = "d"; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun port { 35*4882a593Smuzhiyun hdmi_connector_in: endpoint { 36*4882a593Smuzhiyun remote-endpoint = <&hdmi0_out>; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun extcon_usb: extcon_iddig { 42*4882a593Smuzhiyun compatible = "linux,extcon-usb-gpio"; 43*4882a593Smuzhiyun id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun usb_p1_vbus: regulator@0 { 47*4882a593Smuzhiyun compatible = "regulator-fixed"; 48*4882a593Smuzhiyun regulator-name = "usb_vbus"; 49*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 50*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 51*4882a593Smuzhiyun gpio = <&pio 130 GPIO_ACTIVE_HIGH>; 52*4882a593Smuzhiyun enable-active-high; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun usb_p0_vbus: regulator@1 { 56*4882a593Smuzhiyun compatible = "regulator-fixed"; 57*4882a593Smuzhiyun regulator-name = "vbus"; 58*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 59*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 60*4882a593Smuzhiyun gpio = <&pio 9 GPIO_ACTIVE_HIGH>; 61*4882a593Smuzhiyun enable-active-high; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun}; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun&cec { 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&cpu0 { 70*4882a593Smuzhiyun proc-supply = <&mt6397_vpca15_reg>; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&cpu1 { 74*4882a593Smuzhiyun proc-supply = <&mt6397_vpca15_reg>; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&cpu2 { 78*4882a593Smuzhiyun proc-supply = <&da9211_vcpu_reg>; 79*4882a593Smuzhiyun sram-supply = <&mt6397_vsramca7_reg>; 80*4882a593Smuzhiyun}; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun&cpu3 { 83*4882a593Smuzhiyun proc-supply = <&da9211_vcpu_reg>; 84*4882a593Smuzhiyun sram-supply = <&mt6397_vsramca7_reg>; 85*4882a593Smuzhiyun}; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun&dpi0 { 88*4882a593Smuzhiyun status = "okay"; 89*4882a593Smuzhiyun}; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun&hdmi_phy { 92*4882a593Smuzhiyun status = "okay"; 93*4882a593Smuzhiyun}; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun&hdmi0 { 96*4882a593Smuzhiyun status = "okay"; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun ports { 99*4882a593Smuzhiyun port@1 { 100*4882a593Smuzhiyun reg = <1>; 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun hdmi0_out: endpoint { 103*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun}; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun&i2c1 { 110*4882a593Smuzhiyun status = "okay"; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun buck: da9211@68 { 113*4882a593Smuzhiyun compatible = "dlg,da9211"; 114*4882a593Smuzhiyun reg = <0x68>; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun regulators { 117*4882a593Smuzhiyun da9211_vcpu_reg: BUCKA { 118*4882a593Smuzhiyun regulator-name = "VBUCKA"; 119*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 120*4882a593Smuzhiyun regulator-max-microvolt = <1310000>; 121*4882a593Smuzhiyun regulator-min-microamp = <2000000>; 122*4882a593Smuzhiyun regulator-max-microamp = <4400000>; 123*4882a593Smuzhiyun regulator-ramp-delay = <10000>; 124*4882a593Smuzhiyun regulator-always-on; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun da9211_vgpu_reg: BUCKB { 128*4882a593Smuzhiyun regulator-name = "VBUCKB"; 129*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 130*4882a593Smuzhiyun regulator-max-microvolt = <1310000>; 131*4882a593Smuzhiyun regulator-min-microamp = <2000000>; 132*4882a593Smuzhiyun regulator-max-microamp = <3000000>; 133*4882a593Smuzhiyun regulator-ramp-delay = <10000>; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun }; 137*4882a593Smuzhiyun}; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun&mmc0 { 140*4882a593Smuzhiyun status = "okay"; 141*4882a593Smuzhiyun pinctrl-names = "default", "state_uhs"; 142*4882a593Smuzhiyun pinctrl-0 = <&mmc0_pins_default>; 143*4882a593Smuzhiyun pinctrl-1 = <&mmc0_pins_uhs>; 144*4882a593Smuzhiyun bus-width = <8>; 145*4882a593Smuzhiyun max-frequency = <50000000>; 146*4882a593Smuzhiyun cap-mmc-highspeed; 147*4882a593Smuzhiyun mediatek,hs200-cmd-int-delay=<26>; 148*4882a593Smuzhiyun mediatek,hs400-cmd-int-delay=<14>; 149*4882a593Smuzhiyun mediatek,hs400-cmd-resp-sel-rising; 150*4882a593Smuzhiyun vmmc-supply = <&mt6397_vemc_3v3_reg>; 151*4882a593Smuzhiyun vqmmc-supply = <&mt6397_vio18_reg>; 152*4882a593Smuzhiyun non-removable; 153*4882a593Smuzhiyun}; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun&mmc1 { 156*4882a593Smuzhiyun status = "okay"; 157*4882a593Smuzhiyun pinctrl-names = "default", "state_uhs"; 158*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins_default>; 159*4882a593Smuzhiyun pinctrl-1 = <&mmc1_pins_uhs>; 160*4882a593Smuzhiyun bus-width = <4>; 161*4882a593Smuzhiyun max-frequency = <50000000>; 162*4882a593Smuzhiyun cap-sd-highspeed; 163*4882a593Smuzhiyun sd-uhs-sdr25; 164*4882a593Smuzhiyun cd-gpios = <&pio 132 0>; 165*4882a593Smuzhiyun vmmc-supply = <&mt6397_vmch_reg>; 166*4882a593Smuzhiyun vqmmc-supply = <&mt6397_vmc_reg>; 167*4882a593Smuzhiyun}; 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun&pio { 170*4882a593Smuzhiyun disp_pwm0_pins: disp_pwm0_pins { 171*4882a593Smuzhiyun pins1 { 172*4882a593Smuzhiyun pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>; 173*4882a593Smuzhiyun output-low; 174*4882a593Smuzhiyun }; 175*4882a593Smuzhiyun }; 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun mmc0_pins_default: mmc0default { 178*4882a593Smuzhiyun pins_cmd_dat { 179*4882a593Smuzhiyun pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, 180*4882a593Smuzhiyun <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, 181*4882a593Smuzhiyun <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, 182*4882a593Smuzhiyun <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, 183*4882a593Smuzhiyun <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, 184*4882a593Smuzhiyun <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, 185*4882a593Smuzhiyun <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, 186*4882a593Smuzhiyun <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, 187*4882a593Smuzhiyun <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; 188*4882a593Smuzhiyun input-enable; 189*4882a593Smuzhiyun bias-pull-up; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun pins_clk { 193*4882a593Smuzhiyun pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; 194*4882a593Smuzhiyun bias-pull-down; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun pins_rst { 198*4882a593Smuzhiyun pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; 199*4882a593Smuzhiyun bias-pull-up; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun }; 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun mmc1_pins_default: mmc1default { 204*4882a593Smuzhiyun pins_cmd_dat { 205*4882a593Smuzhiyun pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, 206*4882a593Smuzhiyun <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, 207*4882a593Smuzhiyun <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, 208*4882a593Smuzhiyun <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, 209*4882a593Smuzhiyun <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; 210*4882a593Smuzhiyun input-enable; 211*4882a593Smuzhiyun drive-strength = <MTK_DRIVE_4mA>; 212*4882a593Smuzhiyun bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 213*4882a593Smuzhiyun }; 214*4882a593Smuzhiyun 215*4882a593Smuzhiyun pins_clk { 216*4882a593Smuzhiyun pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; 217*4882a593Smuzhiyun bias-pull-down; 218*4882a593Smuzhiyun drive-strength = <MTK_DRIVE_4mA>; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun pins_insert { 222*4882a593Smuzhiyun pinmux = <MT8173_PIN_132_I2S0_DATA1__FUNC_GPIO132>; 223*4882a593Smuzhiyun bias-pull-up; 224*4882a593Smuzhiyun }; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun mmc0_pins_uhs: mmc0 { 228*4882a593Smuzhiyun pins_cmd_dat { 229*4882a593Smuzhiyun pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>, 230*4882a593Smuzhiyun <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>, 231*4882a593Smuzhiyun <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>, 232*4882a593Smuzhiyun <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>, 233*4882a593Smuzhiyun <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>, 234*4882a593Smuzhiyun <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>, 235*4882a593Smuzhiyun <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>, 236*4882a593Smuzhiyun <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>, 237*4882a593Smuzhiyun <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>; 238*4882a593Smuzhiyun input-enable; 239*4882a593Smuzhiyun drive-strength = <MTK_DRIVE_2mA>; 240*4882a593Smuzhiyun bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 241*4882a593Smuzhiyun }; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun pins_clk { 244*4882a593Smuzhiyun pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>; 245*4882a593Smuzhiyun drive-strength = <MTK_DRIVE_2mA>; 246*4882a593Smuzhiyun bias-pull-down = <MTK_PUPD_SET_R1R0_01>; 247*4882a593Smuzhiyun }; 248*4882a593Smuzhiyun 249*4882a593Smuzhiyun pins_rst { 250*4882a593Smuzhiyun pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>; 251*4882a593Smuzhiyun bias-pull-up; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun }; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun mmc1_pins_uhs: mmc1 { 256*4882a593Smuzhiyun pins_cmd_dat { 257*4882a593Smuzhiyun pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>, 258*4882a593Smuzhiyun <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>, 259*4882a593Smuzhiyun <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>, 260*4882a593Smuzhiyun <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>, 261*4882a593Smuzhiyun <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>; 262*4882a593Smuzhiyun input-enable; 263*4882a593Smuzhiyun drive-strength = <MTK_DRIVE_4mA>; 264*4882a593Smuzhiyun bias-pull-up = <MTK_PUPD_SET_R1R0_10>; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun pins_clk { 268*4882a593Smuzhiyun pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>; 269*4882a593Smuzhiyun drive-strength = <MTK_DRIVE_4mA>; 270*4882a593Smuzhiyun bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 271*4882a593Smuzhiyun }; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun usb_id_pins_float: usb_iddig_pull_up { 275*4882a593Smuzhiyun pins_iddig { 276*4882a593Smuzhiyun pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>; 277*4882a593Smuzhiyun bias-pull-up; 278*4882a593Smuzhiyun }; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun usb_id_pins_ground: usb_iddig_pull_down { 282*4882a593Smuzhiyun pins_iddig { 283*4882a593Smuzhiyun pinmux = <MT8173_PIN_16_IDDIG__FUNC_IDDIG>; 284*4882a593Smuzhiyun bias-pull-down; 285*4882a593Smuzhiyun }; 286*4882a593Smuzhiyun }; 287*4882a593Smuzhiyun}; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun&pwm0 { 290*4882a593Smuzhiyun pinctrl-names = "default"; 291*4882a593Smuzhiyun pinctrl-0 = <&disp_pwm0_pins>; 292*4882a593Smuzhiyun status = "okay"; 293*4882a593Smuzhiyun}; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun&pwrap { 296*4882a593Smuzhiyun /* Only MT8173 E1 needs USB power domain */ 297*4882a593Smuzhiyun power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun pmic: mt6397 { 300*4882a593Smuzhiyun compatible = "mediatek,mt6397"; 301*4882a593Smuzhiyun interrupt-parent = <&pio>; 302*4882a593Smuzhiyun interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; 303*4882a593Smuzhiyun interrupt-controller; 304*4882a593Smuzhiyun #interrupt-cells = <2>; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun mt6397regulator: mt6397regulator { 307*4882a593Smuzhiyun compatible = "mediatek,mt6397-regulator"; 308*4882a593Smuzhiyun 309*4882a593Smuzhiyun mt6397_vpca15_reg: buck_vpca15 { 310*4882a593Smuzhiyun regulator-compatible = "buck_vpca15"; 311*4882a593Smuzhiyun regulator-name = "vpca15"; 312*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 313*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 314*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 315*4882a593Smuzhiyun regulator-always-on; 316*4882a593Smuzhiyun }; 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun mt6397_vpca7_reg: buck_vpca7 { 319*4882a593Smuzhiyun regulator-compatible = "buck_vpca7"; 320*4882a593Smuzhiyun regulator-name = "vpca7"; 321*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 322*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 323*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 324*4882a593Smuzhiyun regulator-enable-ramp-delay = <115>; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun mt6397_vsramca15_reg: buck_vsramca15 { 328*4882a593Smuzhiyun regulator-compatible = "buck_vsramca15"; 329*4882a593Smuzhiyun regulator-name = "vsramca15"; 330*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 331*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 332*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 333*4882a593Smuzhiyun regulator-always-on; 334*4882a593Smuzhiyun }; 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun mt6397_vsramca7_reg: buck_vsramca7 { 337*4882a593Smuzhiyun regulator-compatible = "buck_vsramca7"; 338*4882a593Smuzhiyun regulator-name = "vsramca7"; 339*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 340*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 341*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 342*4882a593Smuzhiyun regulator-always-on; 343*4882a593Smuzhiyun }; 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun mt6397_vcore_reg: buck_vcore { 346*4882a593Smuzhiyun regulator-compatible = "buck_vcore"; 347*4882a593Smuzhiyun regulator-name = "vcore"; 348*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 349*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 350*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 351*4882a593Smuzhiyun regulator-always-on; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun mt6397_vgpu_reg: buck_vgpu { 355*4882a593Smuzhiyun regulator-compatible = "buck_vgpu"; 356*4882a593Smuzhiyun regulator-name = "vgpu"; 357*4882a593Smuzhiyun regulator-min-microvolt = < 700000>; 358*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 359*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 360*4882a593Smuzhiyun regulator-enable-ramp-delay = <115>; 361*4882a593Smuzhiyun }; 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun mt6397_vdrm_reg: buck_vdrm { 364*4882a593Smuzhiyun regulator-compatible = "buck_vdrm"; 365*4882a593Smuzhiyun regulator-name = "vdrm"; 366*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 367*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 368*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 369*4882a593Smuzhiyun regulator-always-on; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun mt6397_vio18_reg: buck_vio18 { 373*4882a593Smuzhiyun regulator-compatible = "buck_vio18"; 374*4882a593Smuzhiyun regulator-name = "vio18"; 375*4882a593Smuzhiyun regulator-min-microvolt = <1620000>; 376*4882a593Smuzhiyun regulator-max-microvolt = <1980000>; 377*4882a593Smuzhiyun regulator-ramp-delay = <12500>; 378*4882a593Smuzhiyun regulator-always-on; 379*4882a593Smuzhiyun }; 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun mt6397_vtcxo_reg: ldo_vtcxo { 382*4882a593Smuzhiyun regulator-compatible = "ldo_vtcxo"; 383*4882a593Smuzhiyun regulator-name = "vtcxo"; 384*4882a593Smuzhiyun regulator-always-on; 385*4882a593Smuzhiyun }; 386*4882a593Smuzhiyun 387*4882a593Smuzhiyun mt6397_va28_reg: ldo_va28 { 388*4882a593Smuzhiyun regulator-compatible = "ldo_va28"; 389*4882a593Smuzhiyun regulator-name = "va28"; 390*4882a593Smuzhiyun regulator-always-on; 391*4882a593Smuzhiyun }; 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun mt6397_vcama_reg: ldo_vcama { 394*4882a593Smuzhiyun regulator-compatible = "ldo_vcama"; 395*4882a593Smuzhiyun regulator-name = "vcama"; 396*4882a593Smuzhiyun regulator-min-microvolt = <1500000>; 397*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 398*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 399*4882a593Smuzhiyun }; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun mt6397_vio28_reg: ldo_vio28 { 402*4882a593Smuzhiyun regulator-compatible = "ldo_vio28"; 403*4882a593Smuzhiyun regulator-name = "vio28"; 404*4882a593Smuzhiyun regulator-always-on; 405*4882a593Smuzhiyun }; 406*4882a593Smuzhiyun 407*4882a593Smuzhiyun mt6397_vusb_reg: ldo_vusb { 408*4882a593Smuzhiyun regulator-compatible = "ldo_vusb"; 409*4882a593Smuzhiyun regulator-name = "vusb"; 410*4882a593Smuzhiyun }; 411*4882a593Smuzhiyun 412*4882a593Smuzhiyun mt6397_vmc_reg: ldo_vmc { 413*4882a593Smuzhiyun regulator-compatible = "ldo_vmc"; 414*4882a593Smuzhiyun regulator-name = "vmc"; 415*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 416*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 417*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 418*4882a593Smuzhiyun }; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun mt6397_vmch_reg: ldo_vmch { 421*4882a593Smuzhiyun regulator-compatible = "ldo_vmch"; 422*4882a593Smuzhiyun regulator-name = "vmch"; 423*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 424*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 425*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 426*4882a593Smuzhiyun }; 427*4882a593Smuzhiyun 428*4882a593Smuzhiyun mt6397_vemc_3v3_reg: ldo_vemc3v3 { 429*4882a593Smuzhiyun regulator-compatible = "ldo_vemc3v3"; 430*4882a593Smuzhiyun regulator-name = "vemc_3v3"; 431*4882a593Smuzhiyun regulator-min-microvolt = <3000000>; 432*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 433*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 434*4882a593Smuzhiyun }; 435*4882a593Smuzhiyun 436*4882a593Smuzhiyun mt6397_vgp1_reg: ldo_vgp1 { 437*4882a593Smuzhiyun regulator-compatible = "ldo_vgp1"; 438*4882a593Smuzhiyun regulator-name = "vcamd"; 439*4882a593Smuzhiyun regulator-min-microvolt = <1220000>; 440*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 441*4882a593Smuzhiyun regulator-enable-ramp-delay = <240>; 442*4882a593Smuzhiyun }; 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun mt6397_vgp2_reg: ldo_vgp2 { 445*4882a593Smuzhiyun regulator-compatible = "ldo_vgp2"; 446*4882a593Smuzhiyun regulator-name = "vcamio"; 447*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 448*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 449*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 450*4882a593Smuzhiyun }; 451*4882a593Smuzhiyun 452*4882a593Smuzhiyun mt6397_vgp3_reg: ldo_vgp3 { 453*4882a593Smuzhiyun regulator-compatible = "ldo_vgp3"; 454*4882a593Smuzhiyun regulator-name = "vcamaf"; 455*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 456*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 457*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 458*4882a593Smuzhiyun }; 459*4882a593Smuzhiyun 460*4882a593Smuzhiyun mt6397_vgp4_reg: ldo_vgp4 { 461*4882a593Smuzhiyun regulator-compatible = "ldo_vgp4"; 462*4882a593Smuzhiyun regulator-name = "vgp4"; 463*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 464*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 465*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 466*4882a593Smuzhiyun }; 467*4882a593Smuzhiyun 468*4882a593Smuzhiyun mt6397_vgp5_reg: ldo_vgp5 { 469*4882a593Smuzhiyun regulator-compatible = "ldo_vgp5"; 470*4882a593Smuzhiyun regulator-name = "vgp5"; 471*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 472*4882a593Smuzhiyun regulator-max-microvolt = <3000000>; 473*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 474*4882a593Smuzhiyun }; 475*4882a593Smuzhiyun 476*4882a593Smuzhiyun mt6397_vgp6_reg: ldo_vgp6 { 477*4882a593Smuzhiyun regulator-compatible = "ldo_vgp6"; 478*4882a593Smuzhiyun regulator-name = "vgp6"; 479*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 480*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 481*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 482*4882a593Smuzhiyun }; 483*4882a593Smuzhiyun 484*4882a593Smuzhiyun mt6397_vibr_reg: ldo_vibr { 485*4882a593Smuzhiyun regulator-compatible = "ldo_vibr"; 486*4882a593Smuzhiyun regulator-name = "vibr"; 487*4882a593Smuzhiyun regulator-min-microvolt = <1300000>; 488*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 489*4882a593Smuzhiyun regulator-enable-ramp-delay = <218>; 490*4882a593Smuzhiyun }; 491*4882a593Smuzhiyun }; 492*4882a593Smuzhiyun }; 493*4882a593Smuzhiyun}; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun&pio { 496*4882a593Smuzhiyun spi_pins_a: spi0 { 497*4882a593Smuzhiyun pins_spi { 498*4882a593Smuzhiyun pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>, 499*4882a593Smuzhiyun <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>, 500*4882a593Smuzhiyun <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>, 501*4882a593Smuzhiyun <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>; 502*4882a593Smuzhiyun }; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun}; 505*4882a593Smuzhiyun 506*4882a593Smuzhiyun&spi { 507*4882a593Smuzhiyun pinctrl-names = "default"; 508*4882a593Smuzhiyun pinctrl-0 = <&spi_pins_a>; 509*4882a593Smuzhiyun mediatek,pad-select = <0>; 510*4882a593Smuzhiyun status = "okay"; 511*4882a593Smuzhiyun}; 512*4882a593Smuzhiyun 513*4882a593Smuzhiyun&ssusb { 514*4882a593Smuzhiyun vusb33-supply = <&mt6397_vusb_reg>; 515*4882a593Smuzhiyun vbus-supply = <&usb_p0_vbus>; 516*4882a593Smuzhiyun extcon = <&extcon_usb>; 517*4882a593Smuzhiyun dr_mode = "otg"; 518*4882a593Smuzhiyun wakeup-source; 519*4882a593Smuzhiyun pinctrl-names = "default", "id_float", "id_ground"; 520*4882a593Smuzhiyun pinctrl-0 = <&usb_id_pins_float>; 521*4882a593Smuzhiyun pinctrl-1 = <&usb_id_pins_float>; 522*4882a593Smuzhiyun pinctrl-2 = <&usb_id_pins_ground>; 523*4882a593Smuzhiyun status = "okay"; 524*4882a593Smuzhiyun}; 525*4882a593Smuzhiyun 526*4882a593Smuzhiyun&uart0 { 527*4882a593Smuzhiyun status = "okay"; 528*4882a593Smuzhiyun}; 529*4882a593Smuzhiyun 530*4882a593Smuzhiyun&usb_host { 531*4882a593Smuzhiyun vusb33-supply = <&mt6397_vusb_reg>; 532*4882a593Smuzhiyun vbus-supply = <&usb_p1_vbus>; 533*4882a593Smuzhiyun status = "okay"; 534*4882a593Smuzhiyun}; 535