1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2017 MediaTek Inc. 4*4882a593Smuzhiyun * Author: Mars.C <mars.cheng@mediatek.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun#include "mt6797.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "MediaTek MT6797 Evaluation Board"; 12*4882a593Smuzhiyun compatible = "mediatek,mt6797-evb", "mediatek,mt6797"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun aliases { 15*4882a593Smuzhiyun serial0 = &uart0; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memory@40000000 { 19*4882a593Smuzhiyun device_type = "memory"; 20*4882a593Smuzhiyun reg = <0 0x40000000 0 0x1e800000>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun chosen {}; 24*4882a593Smuzhiyun}; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun&uart0 { 27*4882a593Smuzhiyun status = "okay"; 28*4882a593Smuzhiyun pinctrl-names = "default"; 29*4882a593Smuzhiyun pinctrl-0 = <&uart0_pins_a>; 30*4882a593Smuzhiyun}; 31