1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * dts file for MediaTek MT6380 regulator 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2018 MediaTek Inc. 6*4882a593Smuzhiyun * Author: Chenglin Xu <chenglin.xu@mediatek.com> 7*4882a593Smuzhiyun * Sean Wang <sean.wang@mediatek.com> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun&pwrap { 11*4882a593Smuzhiyun regulators { 12*4882a593Smuzhiyun compatible = "mediatek,mt6380-regulator"; 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun mt6380_vcpu_reg: buck-vcore1 { 15*4882a593Smuzhiyun regulator-name = "vcore1"; 16*4882a593Smuzhiyun regulator-min-microvolt = < 600000>; 17*4882a593Smuzhiyun regulator-max-microvolt = <1393750>; 18*4882a593Smuzhiyun regulator-ramp-delay = <6250>; 19*4882a593Smuzhiyun regulator-always-on; 20*4882a593Smuzhiyun regulator-boot-on; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun mt6380_vcore_reg: buck-vcore { 24*4882a593Smuzhiyun regulator-name = "vcore"; 25*4882a593Smuzhiyun regulator-min-microvolt = <600000>; 26*4882a593Smuzhiyun regulator-max-microvolt = <1393750>; 27*4882a593Smuzhiyun regulator-ramp-delay = <6250>; 28*4882a593Smuzhiyun regulator-always-on; 29*4882a593Smuzhiyun regulator-boot-on; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun mt6380_vrf_reg: buck-vrf { 33*4882a593Smuzhiyun regulator-name = "vrf"; 34*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 35*4882a593Smuzhiyun regulator-max-microvolt = <1575000>; 36*4882a593Smuzhiyun regulator-ramp-delay = <0>; 37*4882a593Smuzhiyun regulator-always-on; 38*4882a593Smuzhiyun regulator-boot-on; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun mt6380_vm_reg: ldo-vm { 42*4882a593Smuzhiyun regulator-name = "vm"; 43*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 44*4882a593Smuzhiyun regulator-max-microvolt = <1400000>; 45*4882a593Smuzhiyun regulator-ramp-delay = <0>; 46*4882a593Smuzhiyun regulator-always-on; 47*4882a593Smuzhiyun regulator-boot-on; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun mt6380_va_reg: ldo-va { 51*4882a593Smuzhiyun regulator-name = "va"; 52*4882a593Smuzhiyun regulator-min-microvolt = <2200000>; 53*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 54*4882a593Smuzhiyun regulator-ramp-delay = <0>; 55*4882a593Smuzhiyun regulator-always-on; 56*4882a593Smuzhiyun regulator-boot-on; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun mt6380_vphy_reg: ldo-vphy { 60*4882a593Smuzhiyun regulator-name = "vphy"; 61*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 62*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 63*4882a593Smuzhiyun regulator-ramp-delay = <0>; 64*4882a593Smuzhiyun regulator-always-on; 65*4882a593Smuzhiyun regulator-boot-on; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun mt6380_vddr_reg: ldo-vddr { 69*4882a593Smuzhiyun regulator-name = "vddr"; 70*4882a593Smuzhiyun regulator-min-microvolt = <1240000>; 71*4882a593Smuzhiyun regulator-max-microvolt = <1840000>; 72*4882a593Smuzhiyun regulator-ramp-delay = <0>; 73*4882a593Smuzhiyun regulator-always-on; 74*4882a593Smuzhiyun regulator-boot-on; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun mt6380_vt_reg: ldo-vt { 78*4882a593Smuzhiyun regulator-name = "vt"; 79*4882a593Smuzhiyun regulator-min-microvolt = <2200000>; 80*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 81*4882a593Smuzhiyun regulator-ramp-delay = <0>; 82*4882a593Smuzhiyun regulator-always-on; 83*4882a593Smuzhiyun regulator-boot-on; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun}; 87