1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2016 Marvell Technology Group Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Device Tree file for Marvell Armada AP806. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#define AP_NAME ap806 9*4882a593Smuzhiyun#include "armada-ap80x.dtsi" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/ { 12*4882a593Smuzhiyun model = "Marvell Armada AP806"; 13*4882a593Smuzhiyun compatible = "marvell,armada-ap806"; 14*4882a593Smuzhiyun}; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun&ap_syscon0 { 17*4882a593Smuzhiyun ap_clk: clock { 18*4882a593Smuzhiyun compatible = "marvell,ap806-clock"; 19*4882a593Smuzhiyun #clock-cells = <1>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun}; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun&ap_syscon1 { 24*4882a593Smuzhiyun cpu_clk: clock-cpu@278 { 25*4882a593Smuzhiyun compatible = "marvell,ap806-cpu-clock"; 26*4882a593Smuzhiyun clocks = <&ap_clk 0>, <&ap_clk 1>; 27*4882a593Smuzhiyun #clock-cells = <1>; 28*4882a593Smuzhiyun reg = <0x278 0xa30>; 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun}; 31