1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/** 3*4882a593Smuzhiyun * dts file for Hisilicon D03 Development Board 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2016 Hisilicon Ltd. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include "hip06.dtsi" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Hisilicon Hip06 D03 Development Board"; 14*4882a593Smuzhiyun compatible = "hisilicon,hip06-d03"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun memory@0 { 17*4882a593Smuzhiyun device_type = "memory"; 18*4882a593Smuzhiyun reg = <0x0 0x00000000 0x0 0x40000000>; 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun chosen { }; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&ipmi0 { 25*4882a593Smuzhiyun status = "okay"; 26*4882a593Smuzhiyun}; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun&uart0 { 29*4882a593Smuzhiyun status = "okay"; 30*4882a593Smuzhiyun}; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunð0 { 33*4882a593Smuzhiyun status = "okay"; 34*4882a593Smuzhiyun}; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyunð1 { 37*4882a593Smuzhiyun status = "okay"; 38*4882a593Smuzhiyun}; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyunð2 { 41*4882a593Smuzhiyun status = "okay"; 42*4882a593Smuzhiyun}; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunð3 { 45*4882a593Smuzhiyun status = "okay"; 46*4882a593Smuzhiyun}; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun&sas1 { 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun}; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun&usb_ohci { 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun}; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun&usb_ehci { 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun}; 59