xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * dts file for Hisilicon HiKey Development Board
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015, Hisilicon Ltd.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/dts-v1/;
10*4882a593Smuzhiyun#include "hi6220.dtsi"
11*4882a593Smuzhiyun#include "hikey-pinctrl.dtsi"
12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "HiKey Development Board";
16*4882a593Smuzhiyun	compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	aliases {
19*4882a593Smuzhiyun		serial0 = &uart0; /* On board UART0 */
20*4882a593Smuzhiyun		serial1 = &uart1; /* BT UART */
21*4882a593Smuzhiyun		serial2 = &uart2; /* LS Expansion UART0 */
22*4882a593Smuzhiyun		serial3 = &uart3; /* LS Expansion UART1 */
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	chosen {
26*4882a593Smuzhiyun		stdout-path = "serial3:115200n8";
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	/*
30*4882a593Smuzhiyun	 * Reserve below regions from memory node:
31*4882a593Smuzhiyun	 *
32*4882a593Smuzhiyun	 *  0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
33*4882a593Smuzhiyun	 *  0x05f0,1000 - 0x05f0,1fff: Reboot reason
34*4882a593Smuzhiyun	 *  0x06df,f000 - 0x06df,ffff: Mailbox message data
35*4882a593Smuzhiyun	 *  0x0740,f000 - 0x0740,ffff: MCU firmware section
36*4882a593Smuzhiyun	 *  0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
37*4882a593Smuzhiyun	 *  0x3e00,0000 - 0x3fff,ffff: OP-TEE
38*4882a593Smuzhiyun	 */
39*4882a593Smuzhiyun	memory@0 {
40*4882a593Smuzhiyun		device_type = "memory";
41*4882a593Smuzhiyun		reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
42*4882a593Smuzhiyun		      <0x00000000 0x05f00000 0x00000000 0x00001000>,
43*4882a593Smuzhiyun		      <0x00000000 0x05f02000 0x00000000 0x00efd000>,
44*4882a593Smuzhiyun		      <0x00000000 0x06e00000 0x00000000 0x0060f000>,
45*4882a593Smuzhiyun		      <0x00000000 0x07410000 0x00000000 0x1aaf0000>,
46*4882a593Smuzhiyun		      <0x00000000 0x22000000 0x00000000 0x1c000000>;
47*4882a593Smuzhiyun	};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun	reserved-memory {
50*4882a593Smuzhiyun		#address-cells = <2>;
51*4882a593Smuzhiyun		#size-cells = <2>;
52*4882a593Smuzhiyun		ranges;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		ramoops@21f00000 {
55*4882a593Smuzhiyun			compatible = "ramoops";
56*4882a593Smuzhiyun			reg = <0x0 0x21f00000 0x0 0x00100000>;
57*4882a593Smuzhiyun			record-size	= <0x00020000>;
58*4882a593Smuzhiyun			console-size	= <0x00020000>;
59*4882a593Smuzhiyun			ftrace-size	= <0x00020000>;
60*4882a593Smuzhiyun		};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		/* global autoconfigured region for contiguous allocations */
63*4882a593Smuzhiyun		linux,cma {
64*4882a593Smuzhiyun			compatible = "shared-dma-pool";
65*4882a593Smuzhiyun			reusable;
66*4882a593Smuzhiyun			size = <0x00000000 0x08000000>;
67*4882a593Smuzhiyun			linux,cma-default;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	reboot-mode-syscon@5f01000 {
72*4882a593Smuzhiyun		compatible = "syscon", "simple-mfd";
73*4882a593Smuzhiyun		reg = <0x0 0x05f01000 0x0 0x00001000>;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun		reboot-mode {
76*4882a593Smuzhiyun			compatible = "syscon-reboot-mode";
77*4882a593Smuzhiyun			offset = <0x0>;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun			mode-normal	= <0x77665501>;
80*4882a593Smuzhiyun			mode-bootloader	= <0x77665500>;
81*4882a593Smuzhiyun			mode-recovery	= <0x77665502>;
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	reg_sys_5v: regulator@0 {
86*4882a593Smuzhiyun		compatible = "regulator-fixed";
87*4882a593Smuzhiyun		regulator-name = "SYS_5V";
88*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
89*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
90*4882a593Smuzhiyun		regulator-boot-on;
91*4882a593Smuzhiyun		regulator-always-on;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	reg_vdd_3v3: regulator@1 {
95*4882a593Smuzhiyun		compatible = "regulator-fixed";
96*4882a593Smuzhiyun		regulator-name = "VDD_3V3";
97*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
98*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
99*4882a593Smuzhiyun		regulator-boot-on;
100*4882a593Smuzhiyun		regulator-always-on;
101*4882a593Smuzhiyun		vin-supply = <&reg_sys_5v>;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	reg_5v_hub: regulator@2 {
105*4882a593Smuzhiyun		compatible = "regulator-fixed";
106*4882a593Smuzhiyun		regulator-name = "5V_HUB";
107*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
108*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
109*4882a593Smuzhiyun		regulator-boot-on;
110*4882a593Smuzhiyun		gpio = <&gpio0 7 0>;
111*4882a593Smuzhiyun		regulator-always-on;
112*4882a593Smuzhiyun		vin-supply = <&reg_sys_5v>;
113*4882a593Smuzhiyun	};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun	wl1835_pwrseq: wl1835-pwrseq {
116*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
117*4882a593Smuzhiyun		/* WLAN_EN GPIO */
118*4882a593Smuzhiyun		reset-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
119*4882a593Smuzhiyun		clocks = <&pmic>;
120*4882a593Smuzhiyun		clock-names = "ext_clock";
121*4882a593Smuzhiyun		post-power-on-delay-ms = <10>;
122*4882a593Smuzhiyun		power-off-delay-us = <10>;
123*4882a593Smuzhiyun	};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun	leds {
126*4882a593Smuzhiyun		compatible = "gpio-leds";
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		user_led1 {
129*4882a593Smuzhiyun			label = "green:user1";
130*4882a593Smuzhiyun			gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
131*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
132*4882a593Smuzhiyun		};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun		user_led2 {
135*4882a593Smuzhiyun			label = "green:user2";
136*4882a593Smuzhiyun			gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
137*4882a593Smuzhiyun			linux,default-trigger = "mmc0";
138*4882a593Smuzhiyun		};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun		user_led3 {
141*4882a593Smuzhiyun			label = "green:user3";
142*4882a593Smuzhiyun			gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
143*4882a593Smuzhiyun			linux,default-trigger = "mmc1";
144*4882a593Smuzhiyun		};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun		user_led4 {
147*4882a593Smuzhiyun			label = "green:user4";
148*4882a593Smuzhiyun			gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
149*4882a593Smuzhiyun			panic-indicator;
150*4882a593Smuzhiyun			linux,default-trigger = "none";
151*4882a593Smuzhiyun		};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun		wlan_active_led {
154*4882a593Smuzhiyun			label = "yellow:wlan";
155*4882a593Smuzhiyun			gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
156*4882a593Smuzhiyun			linux,default-trigger = "phy0tx";
157*4882a593Smuzhiyun			default-state = "off";
158*4882a593Smuzhiyun		};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun		bt_active_led {
161*4882a593Smuzhiyun			label = "blue:bt";
162*4882a593Smuzhiyun			gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
163*4882a593Smuzhiyun			linux,default-trigger = "hci0-power";
164*4882a593Smuzhiyun			default-state = "off";
165*4882a593Smuzhiyun		};
166*4882a593Smuzhiyun	};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	pmic: pmic@f8000000 {
169*4882a593Smuzhiyun		compatible = "hisilicon,hi655x-pmic";
170*4882a593Smuzhiyun		reg = <0x0 0xf8000000 0x0 0x1000>;
171*4882a593Smuzhiyun		#clock-cells = <0>;
172*4882a593Smuzhiyun		interrupt-controller;
173*4882a593Smuzhiyun		#interrupt-cells = <2>;
174*4882a593Smuzhiyun		pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		regulators {
177*4882a593Smuzhiyun			ldo2: LDO2 {
178*4882a593Smuzhiyun				regulator-name = "LDO2_2V8";
179*4882a593Smuzhiyun				regulator-min-microvolt = <2500000>;
180*4882a593Smuzhiyun				regulator-max-microvolt = <3200000>;
181*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
182*4882a593Smuzhiyun			};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun			ldo7: LDO7 {
185*4882a593Smuzhiyun				regulator-name = "LDO7_SDIO";
186*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
187*4882a593Smuzhiyun				regulator-max-microvolt = <3300000>;
188*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
189*4882a593Smuzhiyun			};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun			ldo10: LDO10 {
192*4882a593Smuzhiyun				regulator-name = "LDO10_2V85";
193*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
194*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
195*4882a593Smuzhiyun				regulator-enable-ramp-delay = <360>;
196*4882a593Smuzhiyun			};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun			ldo13: LDO13 {
199*4882a593Smuzhiyun				regulator-name = "LDO13_1V8";
200*4882a593Smuzhiyun				regulator-min-microvolt = <1600000>;
201*4882a593Smuzhiyun				regulator-max-microvolt = <1950000>;
202*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
203*4882a593Smuzhiyun			};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun			ldo14: LDO14 {
206*4882a593Smuzhiyun				regulator-name = "LDO14_2V8";
207*4882a593Smuzhiyun				regulator-min-microvolt = <2500000>;
208*4882a593Smuzhiyun				regulator-max-microvolt = <3200000>;
209*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
210*4882a593Smuzhiyun			};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun			ldo15: LDO15 {
213*4882a593Smuzhiyun				regulator-name = "LDO15_1V8";
214*4882a593Smuzhiyun				regulator-min-microvolt = <1600000>;
215*4882a593Smuzhiyun				regulator-max-microvolt = <1950000>;
216*4882a593Smuzhiyun				regulator-boot-on;
217*4882a593Smuzhiyun				regulator-always-on;
218*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
219*4882a593Smuzhiyun			};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun			ldo17: LDO17 {
222*4882a593Smuzhiyun				regulator-name = "LDO17_2V5";
223*4882a593Smuzhiyun				regulator-min-microvolt = <2500000>;
224*4882a593Smuzhiyun				regulator-max-microvolt = <3200000>;
225*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
226*4882a593Smuzhiyun			};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun			ldo19: LDO19 {
229*4882a593Smuzhiyun				regulator-name = "LDO19_3V0";
230*4882a593Smuzhiyun				regulator-min-microvolt = <1800000>;
231*4882a593Smuzhiyun				regulator-max-microvolt = <3000000>;
232*4882a593Smuzhiyun				regulator-enable-ramp-delay = <360>;
233*4882a593Smuzhiyun			};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun			ldo21: LDO21 {
236*4882a593Smuzhiyun				regulator-name = "LDO21_1V8";
237*4882a593Smuzhiyun				regulator-min-microvolt = <1650000>;
238*4882a593Smuzhiyun				regulator-max-microvolt = <2000000>;
239*4882a593Smuzhiyun				regulator-always-on;
240*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
241*4882a593Smuzhiyun			};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun			ldo22: LDO22 {
244*4882a593Smuzhiyun				regulator-name = "LDO22_1V2";
245*4882a593Smuzhiyun				regulator-min-microvolt = <900000>;
246*4882a593Smuzhiyun				regulator-max-microvolt = <1200000>;
247*4882a593Smuzhiyun				regulator-boot-on;
248*4882a593Smuzhiyun				regulator-always-on;
249*4882a593Smuzhiyun				regulator-enable-ramp-delay = <120>;
250*4882a593Smuzhiyun			};
251*4882a593Smuzhiyun		};
252*4882a593Smuzhiyun	};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun	firmware {
255*4882a593Smuzhiyun		optee {
256*4882a593Smuzhiyun			compatible = "linaro,optee-tz";
257*4882a593Smuzhiyun			method = "smc";
258*4882a593Smuzhiyun		};
259*4882a593Smuzhiyun	};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun	sound_card {
262*4882a593Smuzhiyun		compatible = "audio-graph-card";
263*4882a593Smuzhiyun		dais = <&i2s0_port0>;
264*4882a593Smuzhiyun	};
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&uart1 {
268*4882a593Smuzhiyun	assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
269*4882a593Smuzhiyun	assigned-clock-rates = <150000000>;
270*4882a593Smuzhiyun	status = "okay";
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun	bluetooth {
273*4882a593Smuzhiyun		compatible = "ti,wl1835-st";
274*4882a593Smuzhiyun		enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
275*4882a593Smuzhiyun		clocks = <&pmic>;
276*4882a593Smuzhiyun		clock-names = "ext_clock";
277*4882a593Smuzhiyun	};
278*4882a593Smuzhiyun};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun&uart2 {
281*4882a593Smuzhiyun	status = "okay";
282*4882a593Smuzhiyun	label = "LS-UART0";
283*4882a593Smuzhiyun};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun&uart3 {
286*4882a593Smuzhiyun	status = "okay";
287*4882a593Smuzhiyun	label = "LS-UART1";
288*4882a593Smuzhiyun};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun&ade {
291*4882a593Smuzhiyun	status = "okay";
292*4882a593Smuzhiyun};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun&dsi {
295*4882a593Smuzhiyun	status = "okay";
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun	ports {
298*4882a593Smuzhiyun		/* 1 for output port */
299*4882a593Smuzhiyun		port@1 {
300*4882a593Smuzhiyun			reg = <1>;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun			dsi_out0: endpoint@0 {
303*4882a593Smuzhiyun				remote-endpoint = <&adv7533_in>;
304*4882a593Smuzhiyun			};
305*4882a593Smuzhiyun		};
306*4882a593Smuzhiyun	};
307*4882a593Smuzhiyun};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun&dwmmc_0 {
310*4882a593Smuzhiyun	cap-mmc-highspeed;
311*4882a593Smuzhiyun	non-removable;
312*4882a593Smuzhiyun	bus-width = <0x8>;
313*4882a593Smuzhiyun	vmmc-supply = <&ldo19>;
314*4882a593Smuzhiyun};
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun&dwmmc_1 {
317*4882a593Smuzhiyun	card-detect-delay = <200>;
318*4882a593Smuzhiyun	cap-sd-highspeed;
319*4882a593Smuzhiyun	sd-uhs-sdr12;
320*4882a593Smuzhiyun	sd-uhs-sdr25;
321*4882a593Smuzhiyun	sd-uhs-sdr50;
322*4882a593Smuzhiyun	vqmmc-supply = <&ldo7>;
323*4882a593Smuzhiyun	vmmc-supply = <&ldo10>;
324*4882a593Smuzhiyun	bus-width = <0x4>;
325*4882a593Smuzhiyun	disable-wp;
326*4882a593Smuzhiyun	cd-gpios = <&gpio1 0 1>;
327*4882a593Smuzhiyun};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun&dwmmc_2 {
330*4882a593Smuzhiyun	bus-width = <0x4>;
331*4882a593Smuzhiyun	non-removable;
332*4882a593Smuzhiyun	cap-power-off-card;
333*4882a593Smuzhiyun	vmmc-supply = <&reg_vdd_3v3>;
334*4882a593Smuzhiyun	mmc-pwrseq = <&wl1835_pwrseq>;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun	#address-cells = <0x1>;
337*4882a593Smuzhiyun	#size-cells = <0x0>;
338*4882a593Smuzhiyun	wlcore: wlcore@2 {
339*4882a593Smuzhiyun		compatible = "ti,wl1835";
340*4882a593Smuzhiyun		reg = <2>;	/* sdio func num */
341*4882a593Smuzhiyun		/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
342*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
343*4882a593Smuzhiyun		interrupts = <3 IRQ_TYPE_EDGE_RISING>;
344*4882a593Smuzhiyun	};
345*4882a593Smuzhiyun};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun/*
348*4882a593Smuzhiyun * Legend: proper name = the GPIO line is used as GPIO
349*4882a593Smuzhiyun *         NC = not connected (not routed from the SoC)
350*4882a593Smuzhiyun *         "[PER]" = pin is muxed for peripheral (not GPIO)
351*4882a593Smuzhiyun *         "" = no idea, schematic doesn't say, could be
352*4882a593Smuzhiyun *              unrouted (not connected to any external pin)
353*4882a593Smuzhiyun *         LSEC = Low Speed External Connector
354*4882a593Smuzhiyun *         HSEC = High Speed External Connector
355*4882a593Smuzhiyun *
356*4882a593Smuzhiyun * Pin assignments taken from LeMaker and CircuitCo Schematics
357*4882a593Smuzhiyun * Rev A1.
358*4882a593Smuzhiyun *
359*4882a593Smuzhiyun * For the lines routed to the external connectors the
360*4882a593Smuzhiyun * lines are named after the 96Boards CE Specification 1.0,
361*4882a593Smuzhiyun * Appendix "Expansion Connector Signal Description".
362*4882a593Smuzhiyun *
363*4882a593Smuzhiyun * When the 96Board naming of a line and the schematic name of
364*4882a593Smuzhiyun * the same line are in conflict, the 96Board specification
365*4882a593Smuzhiyun * takes precedence, which means that the external UART on the
366*4882a593Smuzhiyun * LSEC is named UART0 while the schematic and SoC names this
367*4882a593Smuzhiyun * UART2. This is only for the informational lines i.e. "[FOO]",
368*4882a593Smuzhiyun * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
369*4882a593Smuzhiyun * ones actually used for GPIO.
370*4882a593Smuzhiyun */
371*4882a593Smuzhiyun&gpio0 {
372*4882a593Smuzhiyun	gpio-line-names = "PWR_HOLD", "DSI_SEL",
373*4882a593Smuzhiyun	"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
374*4882a593Smuzhiyun	"PWRON_DET", "5V_HUB_EN";
375*4882a593Smuzhiyun};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun&gpio1 {
378*4882a593Smuzhiyun	gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
379*4882a593Smuzhiyun	"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
380*4882a593Smuzhiyun};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun&gpio2 {
383*4882a593Smuzhiyun	gpio-line-names =
384*4882a593Smuzhiyun		"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
385*4882a593Smuzhiyun		"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
386*4882a593Smuzhiyun		"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
387*4882a593Smuzhiyun		"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
388*4882a593Smuzhiyun		"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
389*4882a593Smuzhiyun		"USB_ID_DET", "USB_VBUS_DET",
390*4882a593Smuzhiyun		"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
391*4882a593Smuzhiyun};
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun&gpio3 {
394*4882a593Smuzhiyun	gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
395*4882a593Smuzhiyun	"WLAN_ACTIVE", "NC", "NC";
396*4882a593Smuzhiyun};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun&gpio4 {
399*4882a593Smuzhiyun	gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
400*4882a593Smuzhiyun	"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
401*4882a593Smuzhiyun};
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun&gpio5 {
404*4882a593Smuzhiyun	gpio-line-names = "NC", "NC",
405*4882a593Smuzhiyun	"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
406*4882a593Smuzhiyun	"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
407*4882a593Smuzhiyun	"[AUX_SSI1]", "NC",
408*4882a593Smuzhiyun	"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
409*4882a593Smuzhiyun	"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
410*4882a593Smuzhiyun};
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun&gpio6 {
413*4882a593Smuzhiyun	gpio-line-names =
414*4882a593Smuzhiyun	"[SPI0_DIN]", /* Pin 10: SPI0_DI */
415*4882a593Smuzhiyun	"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
416*4882a593Smuzhiyun	"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
417*4882a593Smuzhiyun	"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
418*4882a593Smuzhiyun	"NC", "NC", "NC",
419*4882a593Smuzhiyun	"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
420*4882a593Smuzhiyun};
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun&gpio7 {
423*4882a593Smuzhiyun	gpio-line-names = "NC", "NC", "NC", "NC",
424*4882a593Smuzhiyun	"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
425*4882a593Smuzhiyun	"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
426*4882a593Smuzhiyun	"NC", "NC";
427*4882a593Smuzhiyun};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun&gpio8 {
430*4882a593Smuzhiyun	gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
431*4882a593Smuzhiyun	"", "", "", "", "", "";
432*4882a593Smuzhiyun};
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun&gpio9 {
435*4882a593Smuzhiyun	gpio-line-names = "",
436*4882a593Smuzhiyun	"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
437*4882a593Smuzhiyun	"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
438*4882a593Smuzhiyun	"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
439*4882a593Smuzhiyun};
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun&gpio10 {
442*4882a593Smuzhiyun	gpio-line-names = "BOOT_SEL",
443*4882a593Smuzhiyun	"[ISP_CCLK1]",
444*4882a593Smuzhiyun	"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
445*4882a593Smuzhiyun	"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
446*4882a593Smuzhiyun	"NC", "NC",
447*4882a593Smuzhiyun	"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
448*4882a593Smuzhiyun	"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
449*4882a593Smuzhiyun};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun&gpio11 {
452*4882a593Smuzhiyun	gpio-line-names =
453*4882a593Smuzhiyun	"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
454*4882a593Smuzhiyun	"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
455*4882a593Smuzhiyun	"", "NC", "NC", "NC", "", "";
456*4882a593Smuzhiyun};
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun&gpio12 {
459*4882a593Smuzhiyun	gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
460*4882a593Smuzhiyun	"[BT_PCM_DO]",
461*4882a593Smuzhiyun	"NC", "NC", "NC", "NC",
462*4882a593Smuzhiyun	"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
463*4882a593Smuzhiyun};
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun&gpio13 {
466*4882a593Smuzhiyun	gpio-line-names = "[UART0_RX]", "[UART0_TX]",
467*4882a593Smuzhiyun	"[BT_UART1_CTS]", "[BT_UART1_RTS]",
468*4882a593Smuzhiyun	"[BT_UART1_RX]", "[BT_UART1_TX]",
469*4882a593Smuzhiyun	"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
470*4882a593Smuzhiyun	"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
471*4882a593Smuzhiyun};
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun&gpio14 {
474*4882a593Smuzhiyun	gpio-line-names =
475*4882a593Smuzhiyun	"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
476*4882a593Smuzhiyun	"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
477*4882a593Smuzhiyun	"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
478*4882a593Smuzhiyun	"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
479*4882a593Smuzhiyun	"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
480*4882a593Smuzhiyun	"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
481*4882a593Smuzhiyun	"[I2C2_SCL]", "[I2C2_SDA]";
482*4882a593Smuzhiyun};
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun&gpio15 {
485*4882a593Smuzhiyun	gpio-line-names = "", "", "", "", "", "", "NC", "";
486*4882a593Smuzhiyun};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun&i2c0 {
492*4882a593Smuzhiyun	status = "okay";
493*4882a593Smuzhiyun};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun&i2c1 {
496*4882a593Smuzhiyun	status = "okay";
497*4882a593Smuzhiyun};
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun&i2c2 {
500*4882a593Smuzhiyun	#address-cells = <1>;
501*4882a593Smuzhiyun	#size-cells = <0>;
502*4882a593Smuzhiyun	status = "okay";
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun	adv7533: adv7533@39 {
505*4882a593Smuzhiyun		compatible = "adi,adv7533";
506*4882a593Smuzhiyun		reg = <0x39>;
507*4882a593Smuzhiyun		interrupt-parent = <&gpio1>;
508*4882a593Smuzhiyun		interrupts = <1 2>;
509*4882a593Smuzhiyun		pd-gpios = <&gpio0 4 0>;
510*4882a593Smuzhiyun		adi,dsi-lanes = <4>;
511*4882a593Smuzhiyun		#sound-dai-cells = <0>;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun		ports {
514*4882a593Smuzhiyun			#address-cells = <1>;
515*4882a593Smuzhiyun			#size-cells = <0>;
516*4882a593Smuzhiyun			port@0 {
517*4882a593Smuzhiyun				adv7533_in: endpoint {
518*4882a593Smuzhiyun					remote-endpoint = <&dsi_out0>;
519*4882a593Smuzhiyun				};
520*4882a593Smuzhiyun			};
521*4882a593Smuzhiyun			port@2 {
522*4882a593Smuzhiyun				reg = <2>;
523*4882a593Smuzhiyun				codec_endpoint: endpoint {
524*4882a593Smuzhiyun					remote-endpoint = <&i2s0_cpu_endpoint>;
525*4882a593Smuzhiyun				};
526*4882a593Smuzhiyun			};
527*4882a593Smuzhiyun		};
528*4882a593Smuzhiyun	};
529*4882a593Smuzhiyun};
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun&i2s0 {
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun	ports {
534*4882a593Smuzhiyun		i2s0_port0: port@0 {
535*4882a593Smuzhiyun			i2s0_cpu_endpoint: endpoint {
536*4882a593Smuzhiyun				remote-endpoint = <&codec_endpoint>;
537*4882a593Smuzhiyun				dai-format = "i2s";
538*4882a593Smuzhiyun			};
539*4882a593Smuzhiyun		};
540*4882a593Smuzhiyun	};
541*4882a593Smuzhiyun};
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun&spi0 {
544*4882a593Smuzhiyun	status = "okay";
545*4882a593Smuzhiyun};
546