1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright 2019 Toradex 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun#include "imx8qxp.dtsi" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/ { 9*4882a593Smuzhiyun model = "Toradex Colibri iMX8QXP/DX Module"; 10*4882a593Smuzhiyun compatible = "toradex,colibri-imx8x", "fsl,imx8qxp"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun chosen { 13*4882a593Smuzhiyun stdout-path = &adma_lpuart3; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun reg_module_3v3: regulator-module-3v3 { 17*4882a593Smuzhiyun compatible = "regulator-fixed"; 18*4882a593Smuzhiyun regulator-name = "+V3.3"; 19*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 20*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun/* On-module I2C */ 25*4882a593Smuzhiyun&adma_i2c0 { 26*4882a593Smuzhiyun #address-cells = <1>; 27*4882a593Smuzhiyun #size-cells = <0>; 28*4882a593Smuzhiyun clock-frequency = <100000>; 29*4882a593Smuzhiyun pinctrl-names = "default"; 30*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c0>, <&pinctrl_sgtl5000_usb_clk>; 31*4882a593Smuzhiyun status = "okay"; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* Touch controller */ 34*4882a593Smuzhiyun touchscreen@2c { 35*4882a593Smuzhiyun compatible = "adi,ad7879-1"; 36*4882a593Smuzhiyun pinctrl-names = "default"; 37*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ad7879_int>; 38*4882a593Smuzhiyun reg = <0x2c>; 39*4882a593Smuzhiyun interrupt-parent = <&lsio_gpio3>; 40*4882a593Smuzhiyun interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 41*4882a593Smuzhiyun touchscreen-max-pressure = <4096>; 42*4882a593Smuzhiyun adi,resistance-plate-x = <120>; 43*4882a593Smuzhiyun adi,first-conversion-delay = /bits/ 8 <3>; 44*4882a593Smuzhiyun adi,acquisition-time = /bits/ 8 <1>; 45*4882a593Smuzhiyun adi,median-filter-size = /bits/ 8 <2>; 46*4882a593Smuzhiyun adi,averaging = /bits/ 8 <1>; 47*4882a593Smuzhiyun adi,conversion-interval = /bits/ 8 <255>; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun/* Colibri I2C */ 52*4882a593Smuzhiyun&adma_i2c1 { 53*4882a593Smuzhiyun #address-cells = <1>; 54*4882a593Smuzhiyun #size-cells = <0>; 55*4882a593Smuzhiyun clock-frequency = <100000>; 56*4882a593Smuzhiyun pinctrl-names = "default"; 57*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_i2c1>; 58*4882a593Smuzhiyun}; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun/* Colibri UART_B */ 61*4882a593Smuzhiyun&adma_lpuart0 { 62*4882a593Smuzhiyun pinctrl-names = "default"; 63*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lpuart0>; 64*4882a593Smuzhiyun}; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun/* Colibri UART_C */ 67*4882a593Smuzhiyun&adma_lpuart2 { 68*4882a593Smuzhiyun pinctrl-names = "default"; 69*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lpuart2>; 70*4882a593Smuzhiyun}; 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun/* Colibri UART_A */ 73*4882a593Smuzhiyun&adma_lpuart3 { 74*4882a593Smuzhiyun pinctrl-names = "default"; 75*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; 76*4882a593Smuzhiyun}; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun/* Colibri FastEthernet */ 79*4882a593Smuzhiyun&fec1 { 80*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 81*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_fec1>; 82*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_fec1_sleep>; 83*4882a593Smuzhiyun phy-mode = "rmii"; 84*4882a593Smuzhiyun phy-handle = <ðphy0>; 85*4882a593Smuzhiyun fsl,magic-packet; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun mdio { 88*4882a593Smuzhiyun #address-cells = <1>; 89*4882a593Smuzhiyun #size-cells = <0>; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun ethphy0: ethernet-phy@2 { 92*4882a593Smuzhiyun compatible = "ethernet-phy-ieee802.3-c22"; 93*4882a593Smuzhiyun max-speed = <100>; 94*4882a593Smuzhiyun reg = <2>; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun/* On-module eMMC */ 100*4882a593Smuzhiyun&usdhc1 { 101*4882a593Smuzhiyun bus-width = <8>; 102*4882a593Smuzhiyun non-removable; 103*4882a593Smuzhiyun no-sd; 104*4882a593Smuzhiyun no-sdio; 105*4882a593Smuzhiyun pinctrl-names = "default", "state_100mhz", "state_200mhz"; 106*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc1>; 107*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 108*4882a593Smuzhiyun pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun}; 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun/* Colibri SD/MMC Card */ 113*4882a593Smuzhiyun&usdhc2 { 114*4882a593Smuzhiyun bus-width = <4>; 115*4882a593Smuzhiyun cd-gpios = <&lsio_gpio3 9 GPIO_ACTIVE_LOW>; 116*4882a593Smuzhiyun vmmc-supply = <®_module_3v3>; 117*4882a593Smuzhiyun pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 118*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 119*4882a593Smuzhiyun pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 120*4882a593Smuzhiyun pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 121*4882a593Smuzhiyun pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>; 122*4882a593Smuzhiyun disable-wp; 123*4882a593Smuzhiyun}; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun&iomuxc { 126*4882a593Smuzhiyun pinctrl-names = "default"; 127*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>; 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun /* On-module touch pen-down interrupt */ 130*4882a593Smuzhiyun pinctrl_ad7879_int: ad7879intgrp { 131*4882a593Smuzhiyun fsl,pins = < 132*4882a593Smuzhiyun IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21 133*4882a593Smuzhiyun >; 134*4882a593Smuzhiyun }; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /* Colibri Analogue Inputs */ 137*4882a593Smuzhiyun pinctrl_adc0: adc0grp { 138*4882a593Smuzhiyun fsl,pins = < 139*4882a593Smuzhiyun IMX8QXP_ADC_IN0_ADMA_ADC_IN0 0x60 /* SODIMM 8 */ 140*4882a593Smuzhiyun IMX8QXP_ADC_IN1_ADMA_ADC_IN1 0x60 /* SODIMM 6 */ 141*4882a593Smuzhiyun IMX8QXP_ADC_IN4_ADMA_ADC_IN4 0x60 /* SODIMM 4 */ 142*4882a593Smuzhiyun IMX8QXP_ADC_IN5_ADMA_ADC_IN5 0x60 /* SODIMM 2 */ 143*4882a593Smuzhiyun >; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun pinctrl_can_int: canintgrp { 147*4882a593Smuzhiyun fsl,pins = < 148*4882a593Smuzhiyun IMX8QXP_QSPI0A_DQS_LSIO_GPIO3_IO13 0x40 /* SODIMM 73 */ 149*4882a593Smuzhiyun >; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun pinctrl_csi_ctl: csictlgrp { 153*4882a593Smuzhiyun fsl,pins = < 154*4882a593Smuzhiyun IMX8QXP_QSPI0A_SS0_B_LSIO_GPIO3_IO14 0x20 /* SODIMM 77 */ 155*4882a593Smuzhiyun IMX8QXP_QSPI0A_SS1_B_LSIO_GPIO3_IO15 0x20 /* SODIMM 89 */ 156*4882a593Smuzhiyun >; 157*4882a593Smuzhiyun }; 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun pinctrl_ext_io0: extio0grp { 160*4882a593Smuzhiyun fsl,pins = < 161*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXD3_LSIO_GPIO5_IO08 0x06000040 /* SODIMM 135 */ 162*4882a593Smuzhiyun >; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* Colibri Ethernet: On-module 100Mbps PHY Micrel KSZ8041 */ 166*4882a593Smuzhiyun pinctrl_fec1: fec1grp { 167*4882a593Smuzhiyun fsl,pins = < 168*4882a593Smuzhiyun IMX8QXP_ENET0_MDC_CONN_ENET0_MDC 0x06000020 169*4882a593Smuzhiyun IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 170*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x61 171*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RCLK50M_OUT 0x06000061 172*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x61 173*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x61 174*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x61 175*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x61 176*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x61 177*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RMII_RX_ER 0x61 178*4882a593Smuzhiyun >; 179*4882a593Smuzhiyun }; 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun pinctrl_fec1_sleep: fec1slpgrp { 182*4882a593Smuzhiyun fsl,pins = < 183*4882a593Smuzhiyun IMX8QXP_ENET0_MDC_LSIO_GPIO5_IO11 0x06000041 184*4882a593Smuzhiyun IMX8QXP_ENET0_MDIO_LSIO_GPIO5_IO10 0x06000041 185*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TX_CTL_LSIO_GPIO4_IO30 0x41 186*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXC_LSIO_GPIO4_IO29 0x41 187*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXD0_LSIO_GPIO4_IO31 0x41 188*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXD1_LSIO_GPIO5_IO00 0x41 189*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RX_CTL_LSIO_GPIO5_IO04 0x41 190*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXD0_LSIO_GPIO5_IO05 0x41 191*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXD1_LSIO_GPIO5_IO06 0x41 192*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXD2_LSIO_GPIO5_IO07 0x41 193*4882a593Smuzhiyun >; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun /* Colibri optional CAN on UART_B RTS/CTS */ 197*4882a593Smuzhiyun pinctrl_flexcan1: flexcan0grp { 198*4882a593Smuzhiyun fsl,pins = < 199*4882a593Smuzhiyun IMX8QXP_FLEXCAN0_TX_ADMA_FLEXCAN0_TX 0x21 /* SODIMM 32 */ 200*4882a593Smuzhiyun IMX8QXP_FLEXCAN0_RX_ADMA_FLEXCAN0_RX 0x21 /* SODIMM 34 */ 201*4882a593Smuzhiyun >; 202*4882a593Smuzhiyun }; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun /* Colibri optional CAN on PS2 */ 205*4882a593Smuzhiyun pinctrl_flexcan2: flexcan1grp { 206*4882a593Smuzhiyun fsl,pins = < 207*4882a593Smuzhiyun IMX8QXP_FLEXCAN1_TX_ADMA_FLEXCAN1_TX 0x21 /* SODIMM 55 */ 208*4882a593Smuzhiyun IMX8QXP_FLEXCAN1_RX_ADMA_FLEXCAN1_RX 0x21 /* SODIMM 63 */ 209*4882a593Smuzhiyun >; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun 212*4882a593Smuzhiyun /* Colibri optional CAN on UART_A TXD/RXD */ 213*4882a593Smuzhiyun pinctrl_flexcan3: flexcan2grp { 214*4882a593Smuzhiyun fsl,pins = < 215*4882a593Smuzhiyun IMX8QXP_FLEXCAN2_TX_ADMA_FLEXCAN2_TX 0x21 /* SODIMM 35 */ 216*4882a593Smuzhiyun IMX8QXP_FLEXCAN2_RX_ADMA_FLEXCAN2_RX 0x21 /* SODIMM 33 */ 217*4882a593Smuzhiyun >; 218*4882a593Smuzhiyun }; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun /* Colibri LCD Back-Light GPIO */ 221*4882a593Smuzhiyun pinctrl_gpio_bl_on: gpioblongrp { 222*4882a593Smuzhiyun fsl,pins = < 223*4882a593Smuzhiyun IMX8QXP_QSPI0A_DATA3_LSIO_GPIO3_IO12 0x60 /* SODIMM 71 */ 224*4882a593Smuzhiyun >; 225*4882a593Smuzhiyun }; 226*4882a593Smuzhiyun 227*4882a593Smuzhiyun pinctrl_gpiokeys: gpiokeysgrp { 228*4882a593Smuzhiyun fsl,pins = < 229*4882a593Smuzhiyun IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041 /* SODIMM 45 */ 230*4882a593Smuzhiyun >; 231*4882a593Smuzhiyun }; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun pinctrl_hog0: hog0grp { 234*4882a593Smuzhiyun fsl,pins = < 235*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXD3_LSIO_GPIO5_IO02 0x06000020 /* SODIMM 65 */ 236*4882a593Smuzhiyun IMX8QXP_CSI_D07_CI_PI_D09 0x61 /* SODIMM 65 */ 237*4882a593Smuzhiyun IMX8QXP_QSPI0A_DATA2_LSIO_GPIO3_IO11 0x20 /* SODIMM 69 */ 238*4882a593Smuzhiyun IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20 /* SODIMM 79 */ 239*4882a593Smuzhiyun IMX8QXP_CSI_D02_CI_PI_D04 0x61 /* SODIMM 79 */ 240*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020 /* SODIMM 85 */ 241*4882a593Smuzhiyun IMX8QXP_CSI_D06_CI_PI_D08 0x61 /* SODIMM 85 */ 242*4882a593Smuzhiyun IMX8QXP_QSPI0B_SCLK_LSIO_GPIO3_IO17 0x20 /* SODIMM 95 */ 243*4882a593Smuzhiyun IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20 /* SODIMM 97 */ 244*4882a593Smuzhiyun IMX8QXP_CSI_D03_CI_PI_D05 0x61 /* SODIMM 97 */ 245*4882a593Smuzhiyun IMX8QXP_QSPI0B_DATA0_LSIO_GPIO3_IO18 0x20 /* SODIMM 99 */ 246*4882a593Smuzhiyun IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20 /* SODIMM 101 */ 247*4882a593Smuzhiyun IMX8QXP_CSI_D00_CI_PI_D02 0x61 /* SODIMM 101 */ 248*4882a593Smuzhiyun IMX8QXP_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */ 249*4882a593Smuzhiyun IMX8QXP_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */ 250*4882a593Smuzhiyun IMX8QXP_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */ 251*4882a593Smuzhiyun IMX8QXP_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x20 /* SODIMM 107 */ 252*4882a593Smuzhiyun IMX8QXP_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */ 253*4882a593Smuzhiyun IMX8QXP_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */ 254*4882a593Smuzhiyun IMX8QXP_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */ 255*4882a593Smuzhiyun IMX8QXP_CSI_PCLK_LSIO_GPIO3_IO00 0x20 /* SODIMM 96 */ 256*4882a593Smuzhiyun IMX8QXP_QSPI0B_DATA3_LSIO_GPIO3_IO21 0x20 /* SODIMM 98 */ 257*4882a593Smuzhiyun IMX8QXP_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */ 258*4882a593Smuzhiyun IMX8QXP_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */ 259*4882a593Smuzhiyun IMX8QXP_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */ 260*4882a593Smuzhiyun IMX8QXP_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x20 /* SODIMM 106 */ 261*4882a593Smuzhiyun >; 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun pinctrl_hog1: hog1grp { 265*4882a593Smuzhiyun fsl,pins = < 266*4882a593Smuzhiyun IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20 /* SODIMM 75 */ 267*4882a593Smuzhiyun IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20 /* SODIMM 93 */ 268*4882a593Smuzhiyun >; 269*4882a593Smuzhiyun }; 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun /* 272*4882a593Smuzhiyun * This pin is used in the SCFW as a UART. Using it from 273*4882a593Smuzhiyun * Linux would require rewritting the SCFW board file. 274*4882a593Smuzhiyun */ 275*4882a593Smuzhiyun pinctrl_hog_scfw: hogscfwgrp { 276*4882a593Smuzhiyun fsl,pins = < 277*4882a593Smuzhiyun IMX8QXP_SCU_GPIO0_00_LSIO_GPIO2_IO03 0x20 /* SODIMM 144 */ 278*4882a593Smuzhiyun >; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun /* On Module I2C */ 282*4882a593Smuzhiyun pinctrl_i2c0: i2c0grp { 283*4882a593Smuzhiyun fsl,pins = < 284*4882a593Smuzhiyun IMX8QXP_MIPI_CSI0_GPIO0_00_ADMA_I2C0_SCL 0x06000021 285*4882a593Smuzhiyun IMX8QXP_MIPI_CSI0_GPIO0_01_ADMA_I2C0_SDA 0x06000021 286*4882a593Smuzhiyun >; 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun /* MIPI DSI I2C accessible on SODIMM (X1) and FFC (X2) */ 290*4882a593Smuzhiyun pinctrl_i2c0_mipi_lvds0: i2c0mipilvds0grp { 291*4882a593Smuzhiyun fsl,pins = < 292*4882a593Smuzhiyun IMX8QXP_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 /* SODIMM 140 */ 293*4882a593Smuzhiyun IMX8QXP_MIPI_DSI0_I2C0_SDA_MIPI_DSI0_I2C0_SDA 0xc6000020 /* SODIMM 142 */ 294*4882a593Smuzhiyun >; 295*4882a593Smuzhiyun }; 296*4882a593Smuzhiyun 297*4882a593Smuzhiyun /* MIPI CSI I2C accessible on SODIMM (X1) and FFC (X3) */ 298*4882a593Smuzhiyun pinctrl_i2c0_mipi_lvds1: i2c0mipilvds1grp { 299*4882a593Smuzhiyun fsl,pins = < 300*4882a593Smuzhiyun IMX8QXP_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 /* SODIMM 186 */ 301*4882a593Smuzhiyun IMX8QXP_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc6000020 /* SODIMM 188 */ 302*4882a593Smuzhiyun >; 303*4882a593Smuzhiyun }; 304*4882a593Smuzhiyun 305*4882a593Smuzhiyun /* Colibri I2C */ 306*4882a593Smuzhiyun pinctrl_i2c1: i2c1grp { 307*4882a593Smuzhiyun fsl,pins = < 308*4882a593Smuzhiyun IMX8QXP_MIPI_DSI0_GPIO0_00_ADMA_I2C1_SCL 0x06000021 /* SODIMM 196 */ 309*4882a593Smuzhiyun IMX8QXP_MIPI_DSI0_GPIO0_01_ADMA_I2C1_SDA 0x06000021 /* SODIMM 194 */ 310*4882a593Smuzhiyun >; 311*4882a593Smuzhiyun }; 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun /* Colibri Parallel RGB LCD Interface */ 314*4882a593Smuzhiyun pinctrl_lcdif: lcdifgrp { 315*4882a593Smuzhiyun fsl,pins = < 316*4882a593Smuzhiyun IMX8QXP_MCLK_OUT0_ADMA_LCDIF_CLK 0x60 /* SODIMM 56 */ 317*4882a593Smuzhiyun IMX8QXP_SPI3_CS0_ADMA_LCDIF_HSYNC 0x60 /* SODIMM 68 */ 318*4882a593Smuzhiyun IMX8QXP_MCLK_IN0_ADMA_LCDIF_VSYNC 0x60 /* SODIMM 82 */ 319*4882a593Smuzhiyun IMX8QXP_MCLK_IN1_ADMA_LCDIF_EN 0x60 /* SODIMM 44 */ 320*4882a593Smuzhiyun IMX8QXP_USDHC1_RESET_B_LSIO_GPIO4_IO19 0x60 /* SODIMM 44 */ 321*4882a593Smuzhiyun IMX8QXP_ESAI0_FSR_ADMA_LCDIF_D00 0x60 /* SODIMM 76 */ 322*4882a593Smuzhiyun IMX8QXP_USDHC1_WP_LSIO_GPIO4_IO21 0x60 /* SODIMM 76 */ 323*4882a593Smuzhiyun IMX8QXP_ESAI0_FST_ADMA_LCDIF_D01 0x60 /* SODIMM 70 */ 324*4882a593Smuzhiyun IMX8QXP_ESAI0_SCKR_ADMA_LCDIF_D02 0x60 /* SODIMM 60 */ 325*4882a593Smuzhiyun IMX8QXP_ESAI0_SCKT_ADMA_LCDIF_D03 0x60 /* SODIMM 58 */ 326*4882a593Smuzhiyun IMX8QXP_ESAI0_TX0_ADMA_LCDIF_D04 0x60 /* SODIMM 78 */ 327*4882a593Smuzhiyun IMX8QXP_ESAI0_TX1_ADMA_LCDIF_D05 0x60 /* SODIMM 72 */ 328*4882a593Smuzhiyun IMX8QXP_ESAI0_TX2_RX3_ADMA_LCDIF_D06 0x60 /* SODIMM 80 */ 329*4882a593Smuzhiyun IMX8QXP_ESAI0_TX3_RX2_ADMA_LCDIF_D07 0x60 /* SODIMM 46 */ 330*4882a593Smuzhiyun IMX8QXP_ESAI0_TX4_RX1_ADMA_LCDIF_D08 0x60 /* SODIMM 62 */ 331*4882a593Smuzhiyun IMX8QXP_ESAI0_TX5_RX0_ADMA_LCDIF_D09 0x60 /* SODIMM 48 */ 332*4882a593Smuzhiyun IMX8QXP_SPDIF0_RX_ADMA_LCDIF_D10 0x60 /* SODIMM 74 */ 333*4882a593Smuzhiyun IMX8QXP_SPDIF0_TX_ADMA_LCDIF_D11 0x60 /* SODIMM 50 */ 334*4882a593Smuzhiyun IMX8QXP_SPDIF0_EXT_CLK_ADMA_LCDIF_D12 0x60 /* SODIMM 52 */ 335*4882a593Smuzhiyun IMX8QXP_SPI3_SCK_ADMA_LCDIF_D13 0x60 /* SODIMM 54 */ 336*4882a593Smuzhiyun IMX8QXP_SPI3_SDO_ADMA_LCDIF_D14 0x60 /* SODIMM 66 */ 337*4882a593Smuzhiyun IMX8QXP_SPI3_SDI_ADMA_LCDIF_D15 0x60 /* SODIMM 64 */ 338*4882a593Smuzhiyun IMX8QXP_SPI3_CS1_ADMA_LCDIF_D16 0x60 /* SODIMM 57 */ 339*4882a593Smuzhiyun IMX8QXP_ENET0_RGMII_TXD2_LSIO_GPIO5_IO01 0x60 /* SODIMM 57 */ 340*4882a593Smuzhiyun IMX8QXP_UART1_CTS_B_ADMA_LCDIF_D17 0x60 /* SODIMM 61 */ 341*4882a593Smuzhiyun >; 342*4882a593Smuzhiyun }; 343*4882a593Smuzhiyun 344*4882a593Smuzhiyun /* Colibri SPI */ 345*4882a593Smuzhiyun pinctrl_lpspi2: lpspi2grp { 346*4882a593Smuzhiyun fsl,pins = < 347*4882a593Smuzhiyun IMX8QXP_SPI2_CS0_LSIO_GPIO1_IO00 0x21 /* SODIMM 86 */ 348*4882a593Smuzhiyun IMX8QXP_SPI2_SDO_ADMA_SPI2_SDO 0x06000040 /* SODIMM 92 */ 349*4882a593Smuzhiyun IMX8QXP_SPI2_SDI_ADMA_SPI2_SDI 0x06000040 /* SODIMM 90 */ 350*4882a593Smuzhiyun IMX8QXP_SPI2_SCK_ADMA_SPI2_SCK 0x06000040 /* SODIMM 88 */ 351*4882a593Smuzhiyun >; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun /* Colibri UART_B */ 355*4882a593Smuzhiyun pinctrl_lpuart0: lpuart0grp { 356*4882a593Smuzhiyun fsl,pins = < 357*4882a593Smuzhiyun IMX8QXP_UART0_RX_ADMA_UART0_RX 0x06000020 /* SODIMM 36 */ 358*4882a593Smuzhiyun IMX8QXP_UART0_TX_ADMA_UART0_TX 0x06000020 /* SODIMM 38 */ 359*4882a593Smuzhiyun IMX8QXP_FLEXCAN0_RX_ADMA_UART0_RTS_B 0x06000020 /* SODIMM 34 */ 360*4882a593Smuzhiyun IMX8QXP_FLEXCAN0_TX_ADMA_UART0_CTS_B 0x06000020 /* SODIMM 32 */ 361*4882a593Smuzhiyun >; 362*4882a593Smuzhiyun }; 363*4882a593Smuzhiyun 364*4882a593Smuzhiyun /* Colibri UART_C */ 365*4882a593Smuzhiyun pinctrl_lpuart2: lpuart2grp { 366*4882a593Smuzhiyun fsl,pins = < 367*4882a593Smuzhiyun IMX8QXP_UART2_RX_ADMA_UART2_RX 0x06000020 /* SODIMM 19 */ 368*4882a593Smuzhiyun IMX8QXP_UART2_TX_ADMA_UART2_TX 0x06000020 /* SODIMM 21 */ 369*4882a593Smuzhiyun >; 370*4882a593Smuzhiyun }; 371*4882a593Smuzhiyun 372*4882a593Smuzhiyun /* Colibri UART_A */ 373*4882a593Smuzhiyun pinctrl_lpuart3: lpuart3grp { 374*4882a593Smuzhiyun fsl,pins = < 375*4882a593Smuzhiyun IMX8QXP_FLEXCAN2_RX_ADMA_UART3_RX 0x06000020 /* SODIMM 33 */ 376*4882a593Smuzhiyun IMX8QXP_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 /* SODIMM 35 */ 377*4882a593Smuzhiyun >; 378*4882a593Smuzhiyun }; 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun /* Colibri UART_A Control */ 381*4882a593Smuzhiyun pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { 382*4882a593Smuzhiyun fsl,pins = < 383*4882a593Smuzhiyun IMX8QXP_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x20 /* SODIMM 23 */ 384*4882a593Smuzhiyun IMX8QXP_SAI1_RXD_LSIO_GPIO0_IO29 0x20 /* SODIMM 25 */ 385*4882a593Smuzhiyun IMX8QXP_SAI1_RXC_LSIO_GPIO0_IO30 0x20 /* SODIMM 27 */ 386*4882a593Smuzhiyun IMX8QXP_CSI_RESET_LSIO_GPIO3_IO03 0x20 /* SODIMM 29 */ 387*4882a593Smuzhiyun IMX8QXP_USDHC1_CD_B_LSIO_GPIO4_IO22 0x20 /* SODIMM 31 */ 388*4882a593Smuzhiyun IMX8QXP_CSI_EN_LSIO_GPIO3_IO02 0x20 /* SODIMM 37 */ 389*4882a593Smuzhiyun >; 390*4882a593Smuzhiyun }; 391*4882a593Smuzhiyun 392*4882a593Smuzhiyun /* On module wifi module */ 393*4882a593Smuzhiyun pinctrl_pcieb: pciebgrp { 394*4882a593Smuzhiyun fsl,pins = < 395*4882a593Smuzhiyun IMX8QXP_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO01 0x04000061 /* SODIMM 178 */ 396*4882a593Smuzhiyun IMX8QXP_PCIE_CTRL0_WAKE_B_LSIO_GPIO4_IO02 0x04000061 /* SODIMM 94 */ 397*4882a593Smuzhiyun IMX8QXP_PCIE_CTRL0_PERST_B_LSIO_GPIO4_IO00 0x60 /* SODIMM 81 */ 398*4882a593Smuzhiyun >; 399*4882a593Smuzhiyun }; 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun /* Colibri PWM_A */ 402*4882a593Smuzhiyun pinctrl_pwm_a: pwmagrp { 403*4882a593Smuzhiyun /* both pins are connected together, reserve the unused CSI_D05 */ 404*4882a593Smuzhiyun fsl,pins = < 405*4882a593Smuzhiyun IMX8QXP_CSI_D05_CI_PI_D07 0x61 /* SODIMM 59 */ 406*4882a593Smuzhiyun IMX8QXP_SPI0_CS1_ADMA_LCD_PWM0_OUT 0x60 /* SODIMM 59 */ 407*4882a593Smuzhiyun >; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun /* Colibri PWM_B */ 411*4882a593Smuzhiyun pinctrl_pwm_b: pwmbgrp { 412*4882a593Smuzhiyun fsl,pins = < 413*4882a593Smuzhiyun IMX8QXP_UART1_TX_LSIO_PWM0_OUT 0x60 /* SODIMM 28 */ 414*4882a593Smuzhiyun >; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun /* Colibri PWM_C */ 418*4882a593Smuzhiyun pinctrl_pwm_c: pwmcgrp { 419*4882a593Smuzhiyun fsl,pins = < 420*4882a593Smuzhiyun IMX8QXP_UART1_RX_LSIO_PWM1_OUT 0x60 /* SODIMM 30 */ 421*4882a593Smuzhiyun >; 422*4882a593Smuzhiyun }; 423*4882a593Smuzhiyun 424*4882a593Smuzhiyun /* Colibri PWM_D */ 425*4882a593Smuzhiyun pinctrl_pwm_d: pwmdgrp { 426*4882a593Smuzhiyun /* both pins are connected together, reserve the unused CSI_D04 */ 427*4882a593Smuzhiyun fsl,pins = < 428*4882a593Smuzhiyun IMX8QXP_CSI_D04_CI_PI_D06 0x61 /* SODIMM 67 */ 429*4882a593Smuzhiyun IMX8QXP_UART1_RTS_B_LSIO_PWM2_OUT 0x60 /* SODIMM 67 */ 430*4882a593Smuzhiyun >; 431*4882a593Smuzhiyun }; 432*4882a593Smuzhiyun 433*4882a593Smuzhiyun /* On-module I2S */ 434*4882a593Smuzhiyun pinctrl_sai0: sai0grp { 435*4882a593Smuzhiyun fsl,pins = < 436*4882a593Smuzhiyun IMX8QXP_SPI0_SDI_ADMA_SAI0_TXD 0x06000040 437*4882a593Smuzhiyun IMX8QXP_SPI0_CS0_ADMA_SAI0_RXD 0x06000040 438*4882a593Smuzhiyun IMX8QXP_SPI0_SCK_ADMA_SAI0_TXC 0x06000040 439*4882a593Smuzhiyun IMX8QXP_SPI0_SDO_ADMA_SAI0_TXFS 0x06000040 440*4882a593Smuzhiyun >; 441*4882a593Smuzhiyun }; 442*4882a593Smuzhiyun 443*4882a593Smuzhiyun /* Colibri Audio Analogue Microphone GND */ 444*4882a593Smuzhiyun pinctrl_sgtl5000: sgtl5000grp { 445*4882a593Smuzhiyun fsl,pins = < 446*4882a593Smuzhiyun /* MIC GND EN */ 447*4882a593Smuzhiyun IMX8QXP_MIPI_CSI0_I2C0_SDA_LSIO_GPIO3_IO06 0x41 448*4882a593Smuzhiyun >; 449*4882a593Smuzhiyun }; 450*4882a593Smuzhiyun 451*4882a593Smuzhiyun /* On-module SGTL5000 clock */ 452*4882a593Smuzhiyun pinctrl_sgtl5000_usb_clk: sgtl5000usbclkgrp { 453*4882a593Smuzhiyun fsl,pins = < 454*4882a593Smuzhiyun IMX8QXP_ADC_IN3_ADMA_ACM_MCLK_OUT0 0x21 455*4882a593Smuzhiyun >; 456*4882a593Smuzhiyun }; 457*4882a593Smuzhiyun 458*4882a593Smuzhiyun /* On-module USB interrupt */ 459*4882a593Smuzhiyun pinctrl_usb3503a: usb3503agrp { 460*4882a593Smuzhiyun fsl,pins = < 461*4882a593Smuzhiyun IMX8QXP_MIPI_CSI0_MCLK_OUT_LSIO_GPIO3_IO04 0x61 462*4882a593Smuzhiyun >; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun 465*4882a593Smuzhiyun /* Colibri USB Client Cable Detect */ 466*4882a593Smuzhiyun pinctrl_usbc_det: usbcdetgrp { 467*4882a593Smuzhiyun fsl,pins = < 468*4882a593Smuzhiyun IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09 0x06000040 /* SODIMM 137 */ 469*4882a593Smuzhiyun >; 470*4882a593Smuzhiyun }; 471*4882a593Smuzhiyun 472*4882a593Smuzhiyun /* USB Host Power Enable */ 473*4882a593Smuzhiyun pinctrl_usbh1_reg: usbh1reggrp { 474*4882a593Smuzhiyun fsl,pins = < 475*4882a593Smuzhiyun IMX8QXP_USB_SS3_TC0_LSIO_GPIO4_IO03 0x06000040 /* SODIMM 129 */ 476*4882a593Smuzhiyun >; 477*4882a593Smuzhiyun }; 478*4882a593Smuzhiyun 479*4882a593Smuzhiyun /* On-module eMMC */ 480*4882a593Smuzhiyun pinctrl_usdhc1: usdhc1grp { 481*4882a593Smuzhiyun fsl,pins = < 482*4882a593Smuzhiyun IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 483*4882a593Smuzhiyun IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 484*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 485*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 486*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 487*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 488*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 489*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 490*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 491*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 492*4882a593Smuzhiyun IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 493*4882a593Smuzhiyun IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 494*4882a593Smuzhiyun >; 495*4882a593Smuzhiyun }; 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 498*4882a593Smuzhiyun fsl,pins = < 499*4882a593Smuzhiyun IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 500*4882a593Smuzhiyun IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 501*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 502*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 503*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 504*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 505*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 506*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 507*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 508*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 509*4882a593Smuzhiyun IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 510*4882a593Smuzhiyun IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 511*4882a593Smuzhiyun >; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun 514*4882a593Smuzhiyun pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 515*4882a593Smuzhiyun fsl,pins = < 516*4882a593Smuzhiyun IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 517*4882a593Smuzhiyun IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD 0x21 518*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0 0x21 519*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1 0x21 520*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2 0x21 521*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3 0x21 522*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4 0x21 523*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5 0x21 524*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6 0x21 525*4882a593Smuzhiyun IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7 0x21 526*4882a593Smuzhiyun IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE 0x41 527*4882a593Smuzhiyun IMX8QXP_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x21 528*4882a593Smuzhiyun >; 529*4882a593Smuzhiyun }; 530*4882a593Smuzhiyun 531*4882a593Smuzhiyun /* Colibri SD/MMC Card Detect */ 532*4882a593Smuzhiyun pinctrl_usdhc2_gpio: usdhc2gpiogrp { 533*4882a593Smuzhiyun fsl,pins = < 534*4882a593Smuzhiyun IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x06000021 /* SODIMM 43 */ 535*4882a593Smuzhiyun >; 536*4882a593Smuzhiyun }; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun pinctrl_usdhc2_gpio_sleep: usdhc2gpioslpgrp { 539*4882a593Smuzhiyun fsl,pins = < 540*4882a593Smuzhiyun IMX8QXP_QSPI0A_DATA0_LSIO_GPIO3_IO09 0x60 /* SODIMM 43 */ 541*4882a593Smuzhiyun >; 542*4882a593Smuzhiyun }; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun /* Colibri SD/MMC Card */ 545*4882a593Smuzhiyun pinctrl_usdhc2: usdhc2grp { 546*4882a593Smuzhiyun fsl,pins = < 547*4882a593Smuzhiyun IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ 548*4882a593Smuzhiyun IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ 549*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ 550*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ 551*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ 552*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ 553*4882a593Smuzhiyun IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 554*4882a593Smuzhiyun >; 555*4882a593Smuzhiyun }; 556*4882a593Smuzhiyun 557*4882a593Smuzhiyun pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 558*4882a593Smuzhiyun fsl,pins = < 559*4882a593Smuzhiyun IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ 560*4882a593Smuzhiyun IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ 561*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ 562*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ 563*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ 564*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ 565*4882a593Smuzhiyun IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 566*4882a593Smuzhiyun >; 567*4882a593Smuzhiyun }; 568*4882a593Smuzhiyun 569*4882a593Smuzhiyun pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 570*4882a593Smuzhiyun fsl,pins = < 571*4882a593Smuzhiyun IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 /* SODIMM 47 */ 572*4882a593Smuzhiyun IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD 0x21 /* SODIMM 190 */ 573*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0 0x21 /* SODIMM 192 */ 574*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1 0x21 /* SODIMM 49 */ 575*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2 0x21 /* SODIMM 51 */ 576*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3 0x21 /* SODIMM 53 */ 577*4882a593Smuzhiyun IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 578*4882a593Smuzhiyun >; 579*4882a593Smuzhiyun }; 580*4882a593Smuzhiyun 581*4882a593Smuzhiyun pinctrl_usdhc2_sleep: usdhc2slpgrp { 582*4882a593Smuzhiyun fsl,pins = < 583*4882a593Smuzhiyun IMX8QXP_USDHC1_CLK_LSIO_GPIO4_IO23 0x60 /* SODIMM 47 */ 584*4882a593Smuzhiyun IMX8QXP_USDHC1_CMD_LSIO_GPIO4_IO24 0x60 /* SODIMM 190 */ 585*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA0_LSIO_GPIO4_IO25 0x60 /* SODIMM 192 */ 586*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA1_LSIO_GPIO4_IO26 0x60 /* SODIMM 49 */ 587*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA2_LSIO_GPIO4_IO27 0x60 /* SODIMM 51 */ 588*4882a593Smuzhiyun IMX8QXP_USDHC1_DATA3_LSIO_GPIO4_IO28 0x60 /* SODIMM 53 */ 589*4882a593Smuzhiyun IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x21 590*4882a593Smuzhiyun >; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun 593*4882a593Smuzhiyun pinctrl_wifi: wifigrp { 594*4882a593Smuzhiyun fsl,pins = < 595*4882a593Smuzhiyun IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20 596*4882a593Smuzhiyun >; 597*4882a593Smuzhiyun }; 598*4882a593Smuzhiyun}; 599