xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree file for Freescale LS2080A RDB Board.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2016 Freescale Semiconductor, Inc.
6*4882a593Smuzhiyun * Copyright 2017 NXP
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Abhimanyu Saini <abhimanyu.saini@nxp.com>
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun&esdhc {
13*4882a593Smuzhiyun	status = "okay";
14*4882a593Smuzhiyun};
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun&ifc {
17*4882a593Smuzhiyun	status = "okay";
18*4882a593Smuzhiyun	#address-cells = <2>;
19*4882a593Smuzhiyun	#size-cells = <1>;
20*4882a593Smuzhiyun	ranges = <0x0 0x0 0x5 0x80000000 0x08000000
21*4882a593Smuzhiyun		  0x2 0x0 0x5 0x30000000 0x00010000
22*4882a593Smuzhiyun		  0x3 0x0 0x5 0x20000000 0x00010000>;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	nor@0,0 {
25*4882a593Smuzhiyun		#address-cells = <1>;
26*4882a593Smuzhiyun		#size-cells = <1>;
27*4882a593Smuzhiyun		compatible = "cfi-flash";
28*4882a593Smuzhiyun		reg = <0x0 0x0 0x8000000>;
29*4882a593Smuzhiyun		bank-width = <2>;
30*4882a593Smuzhiyun		device-width = <1>;
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun	nand@2,0 {
34*4882a593Smuzhiyun	     compatible = "fsl,ifc-nand";
35*4882a593Smuzhiyun	     reg = <0x2 0x0 0x10000>;
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	cpld@3,0 {
39*4882a593Smuzhiyun	     reg = <0x3 0x0 0x10000>;
40*4882a593Smuzhiyun	     compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&i2c0 {
46*4882a593Smuzhiyun	status = "okay";
47*4882a593Smuzhiyun	pca9547@75 {
48*4882a593Smuzhiyun		compatible = "nxp,pca9547";
49*4882a593Smuzhiyun		reg = <0x75>;
50*4882a593Smuzhiyun		#address-cells = <1>;
51*4882a593Smuzhiyun		#size-cells = <0>;
52*4882a593Smuzhiyun		i2c@1 {
53*4882a593Smuzhiyun			#address-cells = <1>;
54*4882a593Smuzhiyun			#size-cells = <0>;
55*4882a593Smuzhiyun			reg = <0x01>;
56*4882a593Smuzhiyun			rtc@68 {
57*4882a593Smuzhiyun				compatible = "dallas,ds3232";
58*4882a593Smuzhiyun				reg = <0x68>;
59*4882a593Smuzhiyun			};
60*4882a593Smuzhiyun		};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		i2c@2 {
63*4882a593Smuzhiyun			#address-cells = <1>;
64*4882a593Smuzhiyun			#size-cells = <0>;
65*4882a593Smuzhiyun			reg = <0x02>;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun			ina220@40 {
68*4882a593Smuzhiyun				compatible = "ti,ina220";
69*4882a593Smuzhiyun				reg = <0x40>;
70*4882a593Smuzhiyun				shunt-resistor = <500>;
71*4882a593Smuzhiyun			};
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		i2c@3 {
75*4882a593Smuzhiyun			#address-cells = <1>;
76*4882a593Smuzhiyun			#size-cells = <0>;
77*4882a593Smuzhiyun			reg = <0x3>;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun			adt7481@4c {
80*4882a593Smuzhiyun				compatible = "adi,adt7461";
81*4882a593Smuzhiyun				reg = <0x4c>;
82*4882a593Smuzhiyun			};
83*4882a593Smuzhiyun		};
84*4882a593Smuzhiyun	};
85*4882a593Smuzhiyun};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun&i2c1 {
88*4882a593Smuzhiyun	status = "disabled";
89*4882a593Smuzhiyun};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun&i2c2 {
92*4882a593Smuzhiyun	status = "disabled";
93*4882a593Smuzhiyun};
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun&i2c3 {
96*4882a593Smuzhiyun	status = "disabled";
97*4882a593Smuzhiyun};
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun&dspi {
100*4882a593Smuzhiyun	status = "okay";
101*4882a593Smuzhiyun	dflash0: n25q512a@0 {
102*4882a593Smuzhiyun		#address-cells = <1>;
103*4882a593Smuzhiyun		#size-cells = <1>;
104*4882a593Smuzhiyun		compatible = "st,m25p80";
105*4882a593Smuzhiyun		spi-max-frequency = <3000000>;
106*4882a593Smuzhiyun		reg = <0>;
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun&qspi {
111*4882a593Smuzhiyun	status = "okay";
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	s25fs512s0: flash@0 {
114*4882a593Smuzhiyun		#address-cells = <1>;
115*4882a593Smuzhiyun		#size-cells = <1>;
116*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
117*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
118*4882a593Smuzhiyun		reg = <0>;
119*4882a593Smuzhiyun	};
120*4882a593Smuzhiyun};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun&sata0 {
123*4882a593Smuzhiyun	status = "okay";
124*4882a593Smuzhiyun};
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun&sata1 {
127*4882a593Smuzhiyun	status = "okay";
128*4882a593Smuzhiyun};
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun&usb0 {
131*4882a593Smuzhiyun	status = "okay";
132*4882a593Smuzhiyun};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun&usb1 {
135*4882a593Smuzhiyun	status = "okay";
136*4882a593Smuzhiyun};
137