1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Device Tree file for NXP LS1088A RDB Board. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright 2017 NXP 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Harninder Rai <harninder.rai@nxp.com> 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun#include "fsl-ls1088a.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "LS1088A RDB Board"; 17*4882a593Smuzhiyun compatible = "fsl,ls1088a-rdb", "fsl,ls1088a"; 18*4882a593Smuzhiyun}; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun&i2c0 { 21*4882a593Smuzhiyun status = "okay"; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun i2c-switch@77 { 24*4882a593Smuzhiyun compatible = "nxp,pca9547"; 25*4882a593Smuzhiyun reg = <0x77>; 26*4882a593Smuzhiyun #address-cells = <1>; 27*4882a593Smuzhiyun #size-cells = <0>; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun i2c@2 { 30*4882a593Smuzhiyun #address-cells = <1>; 31*4882a593Smuzhiyun #size-cells = <0>; 32*4882a593Smuzhiyun reg = <0x2>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun ina220@40 { 35*4882a593Smuzhiyun compatible = "ti,ina220"; 36*4882a593Smuzhiyun reg = <0x40>; 37*4882a593Smuzhiyun shunt-resistor = <1000>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun i2c@3 { 42*4882a593Smuzhiyun #address-cells = <1>; 43*4882a593Smuzhiyun #size-cells = <0>; 44*4882a593Smuzhiyun reg = <0x3>; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun temp-sensor@4c { 47*4882a593Smuzhiyun compatible = "adi,adt7461a"; 48*4882a593Smuzhiyun reg = <0x4c>; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun rtc@51 { 52*4882a593Smuzhiyun compatible = "nxp,pcf2129"; 53*4882a593Smuzhiyun reg = <0x51>; 54*4882a593Smuzhiyun /* IRQ10_B */ 55*4882a593Smuzhiyun interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun }; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun}; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun&ifc { 62*4882a593Smuzhiyun ranges = <0 0 0x5 0x30000000 0x00010000 63*4882a593Smuzhiyun 2 0 0x5 0x20000000 0x00010000>; 64*4882a593Smuzhiyun status = "okay"; 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun nand@0,0 { 67*4882a593Smuzhiyun compatible = "fsl,ifc-nand"; 68*4882a593Smuzhiyun reg = <0x0 0x0 0x10000>; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun fpga: board-control@2,0 { 72*4882a593Smuzhiyun compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis"; 73*4882a593Smuzhiyun reg = <0x2 0x0 0x0000100>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&duart0 { 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun&duart1 { 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun}; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun&esdhc { 86*4882a593Smuzhiyun mmc-hs200-1_8v; 87*4882a593Smuzhiyun status = "okay"; 88*4882a593Smuzhiyun}; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun&qspi { 91*4882a593Smuzhiyun status = "okay"; 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun s25fs512s0: flash@0 { 94*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 95*4882a593Smuzhiyun #address-cells = <1>; 96*4882a593Smuzhiyun #size-cells = <1>; 97*4882a593Smuzhiyun spi-max-frequency = <50000000>; 98*4882a593Smuzhiyun spi-rx-bus-width = <4>; 99*4882a593Smuzhiyun spi-tx-bus-width = <1>; 100*4882a593Smuzhiyun reg = <0>; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun s25fs512s1: flash@1 { 104*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 105*4882a593Smuzhiyun #address-cells = <1>; 106*4882a593Smuzhiyun #size-cells = <1>; 107*4882a593Smuzhiyun spi-max-frequency = <50000000>; 108*4882a593Smuzhiyun spi-rx-bus-width = <4>; 109*4882a593Smuzhiyun spi-tx-bus-width = <1>; 110*4882a593Smuzhiyun reg = <1>; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun}; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun&sata { 115*4882a593Smuzhiyun status = "okay"; 116*4882a593Smuzhiyun}; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun&usb0 { 119*4882a593Smuzhiyun status = "okay"; 120*4882a593Smuzhiyun}; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun&usb1 { 123*4882a593Smuzhiyun dr_mode = "otg"; 124*4882a593Smuzhiyun status = "okay"; 125*4882a593Smuzhiyun}; 126