xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Include file for Freescale Layerscape-1046A family SoC.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2019 NXP.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/dts-v1/;
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun#include "fsl-ls1046a.dtsi"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun/ {
14*4882a593Smuzhiyun	model = "LS1046A FRWY Board";
15*4882a593Smuzhiyun	compatible = "fsl,ls1046a-frwy", "fsl,ls1046a";
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun	aliases {
18*4882a593Smuzhiyun		serial0 = &duart0;
19*4882a593Smuzhiyun		serial1 = &duart1;
20*4882a593Smuzhiyun		serial2 = &duart2;
21*4882a593Smuzhiyun		serial3 = &duart3;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	chosen {
25*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	sb_3v3: regulator-sb3v3 {
29*4882a593Smuzhiyun		compatible = "regulator-fixed";
30*4882a593Smuzhiyun		regulator-name = "LT8642SEV-3.3V";
31*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
32*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
33*4882a593Smuzhiyun		regulator-boot-on;
34*4882a593Smuzhiyun		regulator-always-on;
35*4882a593Smuzhiyun	};
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&duart0 {
39*4882a593Smuzhiyun	status = "okay";
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun&duart1 {
43*4882a593Smuzhiyun	status = "okay";
44*4882a593Smuzhiyun};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun&duart2 {
47*4882a593Smuzhiyun	status = "okay";
48*4882a593Smuzhiyun};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun&duart3 {
51*4882a593Smuzhiyun	status = "okay";
52*4882a593Smuzhiyun};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun&i2c0 {
55*4882a593Smuzhiyun	status = "okay";
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun	i2c-mux@77 {
58*4882a593Smuzhiyun		compatible = "nxp,pca9546";
59*4882a593Smuzhiyun		reg = <0x77>;
60*4882a593Smuzhiyun		#address-cells = <1>;
61*4882a593Smuzhiyun		#size-cells = <0>;
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun		i2c@0 {
64*4882a593Smuzhiyun			#address-cells = <1>;
65*4882a593Smuzhiyun			#size-cells = <0>;
66*4882a593Smuzhiyun			reg = <0>;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun			power-monitor@40 {
69*4882a593Smuzhiyun				compatible = "ti,ina220";
70*4882a593Smuzhiyun				reg = <0x40>;
71*4882a593Smuzhiyun				shunt-resistor = <1000>;
72*4882a593Smuzhiyun			};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun			temperature-sensor@4c {
75*4882a593Smuzhiyun				compatible = "nxp,sa56004";
76*4882a593Smuzhiyun				reg = <0x4c>;
77*4882a593Smuzhiyun				vcc-supply = <&sb_3v3>;
78*4882a593Smuzhiyun			};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun			rtc@51 {
81*4882a593Smuzhiyun				compatible = "nxp,pcf2129";
82*4882a593Smuzhiyun				reg = <0x51>;
83*4882a593Smuzhiyun			};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun			eeprom@52 {
86*4882a593Smuzhiyun				compatible = "onnn,cat24c04", "atmel,24c04";
87*4882a593Smuzhiyun				reg = <0x52>;
88*4882a593Smuzhiyun			};
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun	};
91*4882a593Smuzhiyun};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun&ifc {
94*4882a593Smuzhiyun	#address-cells = <2>;
95*4882a593Smuzhiyun	#size-cells = <1>;
96*4882a593Smuzhiyun	/* NAND Flash */
97*4882a593Smuzhiyun	ranges = <0x0 0x0 0x0 0x7e800000 0x00010000>;
98*4882a593Smuzhiyun	status = "okay";
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun	nand@0,0 {
101*4882a593Smuzhiyun		compatible = "fsl,ifc-nand";
102*4882a593Smuzhiyun		#address-cells = <1>;
103*4882a593Smuzhiyun		#size-cells = <1>;
104*4882a593Smuzhiyun		reg = <0x0 0x0 0x10000>;
105*4882a593Smuzhiyun	};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun&qspi {
110*4882a593Smuzhiyun	status = "okay";
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun	mt25qu512a0: flash@0 {
113*4882a593Smuzhiyun		compatible = "jedec,spi-nor";
114*4882a593Smuzhiyun		#address-cells = <1>;
115*4882a593Smuzhiyun		#size-cells = <1>;
116*4882a593Smuzhiyun		spi-max-frequency = <50000000>;
117*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
118*4882a593Smuzhiyun		spi-tx-bus-width = <1>;
119*4882a593Smuzhiyun		reg = <0>;
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun#include "fsl-ls1046-post.dtsi"
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun&fman0 {
126*4882a593Smuzhiyun	ethernet@e0000 {
127*4882a593Smuzhiyun		phy-handle = <&qsgmii_phy4>;
128*4882a593Smuzhiyun		phy-connection-type = "qsgmii";
129*4882a593Smuzhiyun	};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun	ethernet@e8000 {
132*4882a593Smuzhiyun		phy-handle = <&qsgmii_phy2>;
133*4882a593Smuzhiyun		phy-connection-type = "qsgmii";
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	ethernet@ea000 {
137*4882a593Smuzhiyun		phy-handle = <&qsgmii_phy1>;
138*4882a593Smuzhiyun		phy-connection-type = "qsgmii";
139*4882a593Smuzhiyun	};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun	ethernet@f2000 {
142*4882a593Smuzhiyun		phy-handle = <&qsgmii_phy3>;
143*4882a593Smuzhiyun		phy-connection-type = "qsgmii";
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	mdio@fd000 {
147*4882a593Smuzhiyun		qsgmii_phy1: ethernet-phy@1c {
148*4882a593Smuzhiyun			reg = <0x1c>;
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun		qsgmii_phy2: ethernet-phy@1d {
152*4882a593Smuzhiyun			reg = <0x1d>;
153*4882a593Smuzhiyun		};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun		qsgmii_phy3: ethernet-phy@1e {
156*4882a593Smuzhiyun			reg = <0x1e>;
157*4882a593Smuzhiyun		};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun		qsgmii_phy4: ethernet-phy@1f {
160*4882a593Smuzhiyun			reg = <0x1f>;
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun	};
163*4882a593Smuzhiyun};
164