xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device Tree Include file for Freescale Layerscape-1043A family SoC.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2014-2015 Freescale Semiconductor, Inc.
6*4882a593Smuzhiyun * Copyright 2018 NXP
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Mingkai Hu <Mingkai.hu@freescale.com>
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/dts-v1/;
12*4882a593Smuzhiyun#include "fsl-ls1043a.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	model = "LS1043A QDS Board";
16*4882a593Smuzhiyun	compatible = "fsl,ls1043a-qds", "fsl,ls1043a";
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	aliases {
19*4882a593Smuzhiyun		gpio0 = &gpio1;
20*4882a593Smuzhiyun		gpio1 = &gpio2;
21*4882a593Smuzhiyun		gpio2 = &gpio3;
22*4882a593Smuzhiyun		gpio3 = &gpio4;
23*4882a593Smuzhiyun		serial0 = &duart0;
24*4882a593Smuzhiyun		serial1 = &duart1;
25*4882a593Smuzhiyun		serial2 = &duart2;
26*4882a593Smuzhiyun		serial3 = &duart3;
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	chosen {
30*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun&duart0 {
35*4882a593Smuzhiyun	status = "okay";
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&duart1 {
39*4882a593Smuzhiyun	status = "okay";
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun&ifc {
43*4882a593Smuzhiyun	#address-cells = <2>;
44*4882a593Smuzhiyun	#size-cells = <1>;
45*4882a593Smuzhiyun	/* NOR, NAND Flashes and FPGA on board */
46*4882a593Smuzhiyun	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
47*4882a593Smuzhiyun		  0x1 0x0 0x0 0x7e800000 0x00010000
48*4882a593Smuzhiyun		  0x2 0x0 0x0 0x7fb00000 0x00000100>;
49*4882a593Smuzhiyun	status = "okay";
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	nor@0,0 {
52*4882a593Smuzhiyun		compatible = "cfi-flash";
53*4882a593Smuzhiyun		reg = <0x0 0x0 0x8000000>;
54*4882a593Smuzhiyun		big-endian;
55*4882a593Smuzhiyun		bank-width = <2>;
56*4882a593Smuzhiyun		device-width = <1>;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	nand@1,0 {
60*4882a593Smuzhiyun		compatible = "fsl,ifc-nand";
61*4882a593Smuzhiyun		reg = <0x1 0x0 0x10000>;
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	fpga: board-control@2,0 {
65*4882a593Smuzhiyun		compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis";
66*4882a593Smuzhiyun		reg = <0x2 0x0 0x0000100>;
67*4882a593Smuzhiyun	};
68*4882a593Smuzhiyun};
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun&i2c0 {
71*4882a593Smuzhiyun	status = "okay";
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	pca9547@77 {
74*4882a593Smuzhiyun		compatible = "nxp,pca9547";
75*4882a593Smuzhiyun		reg = <0x77>;
76*4882a593Smuzhiyun		#address-cells = <1>;
77*4882a593Smuzhiyun		#size-cells = <0>;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		i2c@0 {
80*4882a593Smuzhiyun			#address-cells = <1>;
81*4882a593Smuzhiyun			#size-cells = <0>;
82*4882a593Smuzhiyun			reg = <0x0>;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun			rtc@68 {
85*4882a593Smuzhiyun				compatible = "dallas,ds3232";
86*4882a593Smuzhiyun				reg = <0x68>;
87*4882a593Smuzhiyun				/* IRQ10_B */
88*4882a593Smuzhiyun				interrupts = <0 150 0x4>;
89*4882a593Smuzhiyun			};
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		i2c@2 {
93*4882a593Smuzhiyun			#address-cells = <1>;
94*4882a593Smuzhiyun			#size-cells = <0>;
95*4882a593Smuzhiyun			reg = <0x2>;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun			ina220@40 {
98*4882a593Smuzhiyun				compatible = "ti,ina220";
99*4882a593Smuzhiyun				reg = <0x40>;
100*4882a593Smuzhiyun				shunt-resistor = <1000>;
101*4882a593Smuzhiyun			};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun			ina220@41 {
104*4882a593Smuzhiyun				compatible = "ti,ina220";
105*4882a593Smuzhiyun				reg = <0x41>;
106*4882a593Smuzhiyun				shunt-resistor = <1000>;
107*4882a593Smuzhiyun			};
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun		i2c@3 {
111*4882a593Smuzhiyun			#address-cells = <1>;
112*4882a593Smuzhiyun			#size-cells = <0>;
113*4882a593Smuzhiyun			reg = <0x3>;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun			eeprom@56 {
116*4882a593Smuzhiyun				compatible = "atmel,24c512";
117*4882a593Smuzhiyun				reg = <0x56>;
118*4882a593Smuzhiyun			};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun			eeprom@57 {
121*4882a593Smuzhiyun				compatible = "atmel,24c512";
122*4882a593Smuzhiyun				reg = <0x57>;
123*4882a593Smuzhiyun			};
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun			temp-sensor@4c {
126*4882a593Smuzhiyun				compatible = "adi,adt7461a";
127*4882a593Smuzhiyun				reg = <0x4c>;
128*4882a593Smuzhiyun			};
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun&lpuart0 {
134*4882a593Smuzhiyun	status = "okay";
135*4882a593Smuzhiyun};
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun&qspi {
138*4882a593Smuzhiyun	status = "okay";
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	qflash0: flash@0 {
141*4882a593Smuzhiyun		compatible = "spansion,m25p80";
142*4882a593Smuzhiyun		#address-cells = <1>;
143*4882a593Smuzhiyun		#size-cells = <1>;
144*4882a593Smuzhiyun		spi-max-frequency = <20000000>;
145*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
146*4882a593Smuzhiyun		spi-tx-bus-width = <4>;
147*4882a593Smuzhiyun		reg = <0>;
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun&usb0 {
152*4882a593Smuzhiyun	status = "okay";
153*4882a593Smuzhiyun};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun#include "fsl-ls1043-post.dtsi"
156