1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * ARM Juno Platform clocks 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2013-2014 ARM Ltd 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is licensed under a dual GPLv2 or BSD license. 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun /* SoC fixed clocks */ 11*4882a593Smuzhiyun soc_uartclk: refclk7372800hz { 12*4882a593Smuzhiyun compatible = "fixed-clock"; 13*4882a593Smuzhiyun #clock-cells = <0>; 14*4882a593Smuzhiyun clock-frequency = <7372800>; 15*4882a593Smuzhiyun clock-output-names = "juno:uartclk"; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun soc_usb48mhz: clk48mhz { 19*4882a593Smuzhiyun compatible = "fixed-clock"; 20*4882a593Smuzhiyun #clock-cells = <0>; 21*4882a593Smuzhiyun clock-frequency = <48000000>; 22*4882a593Smuzhiyun clock-output-names = "clk48mhz"; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun soc_smc50mhz: clk50mhz { 26*4882a593Smuzhiyun compatible = "fixed-clock"; 27*4882a593Smuzhiyun #clock-cells = <0>; 28*4882a593Smuzhiyun clock-frequency = <50000000>; 29*4882a593Smuzhiyun clock-output-names = "smc_clk"; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun soc_refclk100mhz: refclk100mhz { 33*4882a593Smuzhiyun compatible = "fixed-clock"; 34*4882a593Smuzhiyun #clock-cells = <0>; 35*4882a593Smuzhiyun clock-frequency = <100000000>; 36*4882a593Smuzhiyun clock-output-names = "apb_pclk"; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun soc_faxiclk: refclk400mhz { 40*4882a593Smuzhiyun compatible = "fixed-clock"; 41*4882a593Smuzhiyun #clock-cells = <0>; 42*4882a593Smuzhiyun clock-frequency = <400000000>; 43*4882a593Smuzhiyun clock-output-names = "faxi_clk"; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun}; 46