1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2016 Endless Computers, Inc. 4*4882a593Smuzhiyun * Author: Carlo Caione <carlo@endlessm.com> 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "meson-gxl.dtsi" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun/ { 10*4882a593Smuzhiyun compatible = "amlogic,meson-gxm"; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun cpus { 13*4882a593Smuzhiyun cpu-map { 14*4882a593Smuzhiyun cluster0 { 15*4882a593Smuzhiyun core0 { 16*4882a593Smuzhiyun cpu = <&cpu0>; 17*4882a593Smuzhiyun }; 18*4882a593Smuzhiyun core1 { 19*4882a593Smuzhiyun cpu = <&cpu1>; 20*4882a593Smuzhiyun }; 21*4882a593Smuzhiyun core2 { 22*4882a593Smuzhiyun cpu = <&cpu2>; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun core3 { 25*4882a593Smuzhiyun cpu = <&cpu3>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun cluster1 { 30*4882a593Smuzhiyun core0 { 31*4882a593Smuzhiyun cpu = <&cpu4>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun core1 { 34*4882a593Smuzhiyun cpu = <&cpu5>; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun core2 { 37*4882a593Smuzhiyun cpu = <&cpu6>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun core3 { 40*4882a593Smuzhiyun cpu = <&cpu7>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun cpu4: cpu@100 { 46*4882a593Smuzhiyun device_type = "cpu"; 47*4882a593Smuzhiyun compatible = "arm,cortex-a53"; 48*4882a593Smuzhiyun reg = <0x0 0x100>; 49*4882a593Smuzhiyun enable-method = "psci"; 50*4882a593Smuzhiyun next-level-cache = <&l2>; 51*4882a593Smuzhiyun clocks = <&scpi_dvfs 1>; 52*4882a593Smuzhiyun #cooling-cells = <2>; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun cpu5: cpu@101 { 56*4882a593Smuzhiyun device_type = "cpu"; 57*4882a593Smuzhiyun compatible = "arm,cortex-a53"; 58*4882a593Smuzhiyun reg = <0x0 0x101>; 59*4882a593Smuzhiyun enable-method = "psci"; 60*4882a593Smuzhiyun next-level-cache = <&l2>; 61*4882a593Smuzhiyun clocks = <&scpi_dvfs 1>; 62*4882a593Smuzhiyun #cooling-cells = <2>; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun cpu6: cpu@102 { 66*4882a593Smuzhiyun device_type = "cpu"; 67*4882a593Smuzhiyun compatible = "arm,cortex-a53"; 68*4882a593Smuzhiyun reg = <0x0 0x102>; 69*4882a593Smuzhiyun enable-method = "psci"; 70*4882a593Smuzhiyun next-level-cache = <&l2>; 71*4882a593Smuzhiyun clocks = <&scpi_dvfs 1>; 72*4882a593Smuzhiyun #cooling-cells = <2>; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun cpu7: cpu@103 { 76*4882a593Smuzhiyun device_type = "cpu"; 77*4882a593Smuzhiyun compatible = "arm,cortex-a53"; 78*4882a593Smuzhiyun reg = <0x0 0x103>; 79*4882a593Smuzhiyun enable-method = "psci"; 80*4882a593Smuzhiyun next-level-cache = <&l2>; 81*4882a593Smuzhiyun clocks = <&scpi_dvfs 1>; 82*4882a593Smuzhiyun #cooling-cells = <2>; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun gpu_opp_table: opp-table { 87*4882a593Smuzhiyun compatible = "operating-points-v2"; 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun opp-125000000 { 90*4882a593Smuzhiyun opp-hz = /bits/ 64 <125000000>; 91*4882a593Smuzhiyun opp-microvolt = <950000>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun opp-250000000 { 94*4882a593Smuzhiyun opp-hz = /bits/ 64 <250000000>; 95*4882a593Smuzhiyun opp-microvolt = <950000>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun opp-285714285 { 98*4882a593Smuzhiyun opp-hz = /bits/ 64 <285714285>; 99*4882a593Smuzhiyun opp-microvolt = <950000>; 100*4882a593Smuzhiyun }; 101*4882a593Smuzhiyun opp-400000000 { 102*4882a593Smuzhiyun opp-hz = /bits/ 64 <400000000>; 103*4882a593Smuzhiyun opp-microvolt = <950000>; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun opp-500000000 { 106*4882a593Smuzhiyun opp-hz = /bits/ 64 <500000000>; 107*4882a593Smuzhiyun opp-microvolt = <950000>; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun opp-666666666 { 110*4882a593Smuzhiyun opp-hz = /bits/ 64 <666666666>; 111*4882a593Smuzhiyun opp-microvolt = <950000>; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun }; 114*4882a593Smuzhiyun}; 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun&apb { 117*4882a593Smuzhiyun usb2_phy2: phy@78040 { 118*4882a593Smuzhiyun compatible = "amlogic,meson-gxl-usb2-phy"; 119*4882a593Smuzhiyun #phy-cells = <0>; 120*4882a593Smuzhiyun reg = <0x0 0x78040 0x0 0x20>; 121*4882a593Smuzhiyun clocks = <&clkc CLKID_USB>; 122*4882a593Smuzhiyun clock-names = "phy"; 123*4882a593Smuzhiyun resets = <&reset RESET_USB_OTG>; 124*4882a593Smuzhiyun reset-names = "phy"; 125*4882a593Smuzhiyun status = "okay"; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun mali: gpu@c0000 { 129*4882a593Smuzhiyun compatible = "amlogic,meson-gxm-mali", "arm,mali-t820"; 130*4882a593Smuzhiyun reg = <0x0 0xc0000 0x0 0x40000>; 131*4882a593Smuzhiyun interrupt-parent = <&gic>; 132*4882a593Smuzhiyun interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, 133*4882a593Smuzhiyun <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, 134*4882a593Smuzhiyun <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>; 135*4882a593Smuzhiyun interrupt-names = "job", "mmu", "gpu"; 136*4882a593Smuzhiyun clocks = <&clkc CLKID_MALI>; 137*4882a593Smuzhiyun resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>; 138*4882a593Smuzhiyun operating-points-v2 = <&gpu_opp_table>; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun}; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun&clkc_AO { 143*4882a593Smuzhiyun compatible = "amlogic,meson-gxm-aoclkc", "amlogic,meson-gx-aoclkc"; 144*4882a593Smuzhiyun}; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun&cpu_cooling_maps { 147*4882a593Smuzhiyun map0 { 148*4882a593Smuzhiyun cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 149*4882a593Smuzhiyun <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 150*4882a593Smuzhiyun <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 151*4882a593Smuzhiyun <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 152*4882a593Smuzhiyun <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 153*4882a593Smuzhiyun <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 154*4882a593Smuzhiyun <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 155*4882a593Smuzhiyun <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun map1 { 159*4882a593Smuzhiyun cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 160*4882a593Smuzhiyun <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 161*4882a593Smuzhiyun <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 162*4882a593Smuzhiyun <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 163*4882a593Smuzhiyun <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 164*4882a593Smuzhiyun <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 165*4882a593Smuzhiyun <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 166*4882a593Smuzhiyun <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun}; 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun&saradc { 171*4882a593Smuzhiyun compatible = "amlogic,meson-gxm-saradc", "amlogic,meson-saradc"; 172*4882a593Smuzhiyun}; 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun&scpi_dvfs { 175*4882a593Smuzhiyun clock-indices = <0 1>; 176*4882a593Smuzhiyun clock-output-names = "vbig", "vlittle"; 177*4882a593Smuzhiyun}; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun&vpu { 180*4882a593Smuzhiyun compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; 181*4882a593Smuzhiyun}; 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun&hdmi_tx { 184*4882a593Smuzhiyun compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi"; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun&usb { 188*4882a593Smuzhiyun compatible = "amlogic,meson-gxm-usb-ctrl"; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun phy-names = "usb2-phy0", "usb2-phy1", "usb2-phy2"; 191*4882a593Smuzhiyun phys = <&usb2_phy0>, <&usb2_phy1>, <&usb2_phy2>; 192*4882a593Smuzhiyun}; 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun&vdec { 195*4882a593Smuzhiyun compatible = "amlogic,gxm-vdec", "amlogic,gx-vdec"; 196*4882a593Smuzhiyun}; 197