1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2018 BayLibre, SAS. 4*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@baylibre.com> 5*4882a593Smuzhiyun * Author: Jerome Brunet <jbrunet@baylibre.com> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun/dts-v1/; 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun#include <dt-bindings/sound/meson-aiu.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun#include "meson-gxl-s805x.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun compatible = "libretech,aml-s805x-ac", "amlogic,s805x", 17*4882a593Smuzhiyun "amlogic,meson-gxl"; 18*4882a593Smuzhiyun model = "Libre Computer AML-S805X-AC"; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun aliases { 21*4882a593Smuzhiyun serial0 = &uart_AO; 22*4882a593Smuzhiyun ethernet0 = ðmac; 23*4882a593Smuzhiyun spi0 = &spifc; 24*4882a593Smuzhiyun }; 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun chosen { 27*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun cvbs-connector { 31*4882a593Smuzhiyun /* 32*4882a593Smuzhiyun * The pads are present but no connector is soldered on 33*4882a593Smuzhiyun * 2J2, so keep this off by default. 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun status = "disabled"; 36*4882a593Smuzhiyun compatible = "composite-video-connector"; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun port { 39*4882a593Smuzhiyun cvbs_connector_in: endpoint { 40*4882a593Smuzhiyun remote-endpoint = <&cvbs_vdac_out>; 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun dc_5v: regulator-dc_5v { 46*4882a593Smuzhiyun compatible = "regulator-fixed"; 47*4882a593Smuzhiyun regulator-name = "DC_5V"; 48*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 49*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 50*4882a593Smuzhiyun regulator-always-on; 51*4882a593Smuzhiyun }; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 54*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 55*4882a593Smuzhiyun reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun hdmi-connector { 59*4882a593Smuzhiyun compatible = "hdmi-connector"; 60*4882a593Smuzhiyun type = "a"; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun port { 63*4882a593Smuzhiyun hdmi_connector_in: endpoint { 64*4882a593Smuzhiyun remote-endpoint = <&hdmi_tx_tmds_out>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun }; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun memory@0 { 70*4882a593Smuzhiyun device_type = "memory"; 71*4882a593Smuzhiyun reg = <0x0 0x0 0x0 0x20000000>; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun vcck: regulator-vcck { 75*4882a593Smuzhiyun compatible = "regulator-fixed"; 76*4882a593Smuzhiyun regulator-name = "VCCK"; 77*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 78*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 79*4882a593Smuzhiyun vin-supply = <&dc_5v>; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* 82*4882a593Smuzhiyun * This is controlled by GPIOAO_9 we reserve this but 83*4882a593Smuzhiyun * claiming it as done below reset the board anyway 84*4882a593Smuzhiyun * Need to investigate this 85*4882a593Smuzhiyun * 86*4882a593Smuzhiyun * gpio = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>; 87*4882a593Smuzhiyun * enable-active-high; 88*4882a593Smuzhiyun */ 89*4882a593Smuzhiyun regulator-always-on; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun vcc_3v3: regulator-vcc_3v3 { 93*4882a593Smuzhiyun compatible = "regulator-fixed"; 94*4882a593Smuzhiyun regulator-name = "VCC_3V3"; 95*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 96*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 97*4882a593Smuzhiyun vin-supply = <&dc_5v>; 98*4882a593Smuzhiyun regulator-always-on; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun vddio_ao18: regulator-vddio_ao18 { 102*4882a593Smuzhiyun compatible = "regulator-fixed"; 103*4882a593Smuzhiyun regulator-name = "VDDIO_AO18"; 104*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 105*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 106*4882a593Smuzhiyun vin-supply = <&vcc_3v3>; 107*4882a593Smuzhiyun regulator-always-on; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun vddio_boot: regulator-vddio_boot { 111*4882a593Smuzhiyun compatible = "regulator-fixed"; 112*4882a593Smuzhiyun regulator-name = "VDDIO_BOOT"; 113*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 114*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 115*4882a593Smuzhiyun vin-supply = <&vcc_3v3>; 116*4882a593Smuzhiyun regulator-always-on; 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun sound { 120*4882a593Smuzhiyun compatible = "amlogic,gx-sound-card"; 121*4882a593Smuzhiyun model = "GXL-LIBRETECH-S805X-AC"; 122*4882a593Smuzhiyun audio-widgets = "Speaker", "9J5-3 LEFT", 123*4882a593Smuzhiyun "Speaker", "9J5-2 RIGHT"; 124*4882a593Smuzhiyun audio-routing = "9J5-3 LEFT", "ACODEC LOLN", 125*4882a593Smuzhiyun "9J5-2 RIGHT", "ACODEC LORN"; 126*4882a593Smuzhiyun assigned-clocks = <&clkc CLKID_MPLL0>, 127*4882a593Smuzhiyun <&clkc CLKID_MPLL1>, 128*4882a593Smuzhiyun <&clkc CLKID_MPLL2>; 129*4882a593Smuzhiyun assigned-clock-parents = <0>, <0>, <0>; 130*4882a593Smuzhiyun assigned-clock-rates = <294912000>, 131*4882a593Smuzhiyun <270950400>, 132*4882a593Smuzhiyun <393216000>; 133*4882a593Smuzhiyun status = "okay"; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun dai-link-0 { 136*4882a593Smuzhiyun sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun dai-link-1 { 140*4882a593Smuzhiyun sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; 141*4882a593Smuzhiyun dai-format = "i2s"; 142*4882a593Smuzhiyun mclk-fs = <256>; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun codec-0 { 145*4882a593Smuzhiyun sound-dai = <&aiu AIU_HDMI CTRL_I2S>; 146*4882a593Smuzhiyun }; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun codec-1 { 149*4882a593Smuzhiyun sound-dai = <&aiu AIU_ACODEC CTRL_I2S>; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun dai-link-2 { 154*4882a593Smuzhiyun sound-dai = <&aiu AIU_HDMI CTRL_OUT>; 155*4882a593Smuzhiyun 156*4882a593Smuzhiyun codec-0 { 157*4882a593Smuzhiyun sound-dai = <&hdmi_tx>; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun dai-link-3 { 162*4882a593Smuzhiyun sound-dai = <&aiu AIU_ACODEC CTRL_OUT>; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun codec-0 { 165*4882a593Smuzhiyun sound-dai = <&acodec>; 166*4882a593Smuzhiyun }; 167*4882a593Smuzhiyun }; 168*4882a593Smuzhiyun }; 169*4882a593Smuzhiyun}; 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun&acodec { 172*4882a593Smuzhiyun AVDD-supply = <&vddio_ao18>; 173*4882a593Smuzhiyun status = "okay"; 174*4882a593Smuzhiyun}; 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun&aiu { 177*4882a593Smuzhiyun status = "okay"; 178*4882a593Smuzhiyun}; 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun&cec_AO { 181*4882a593Smuzhiyun status = "okay"; 182*4882a593Smuzhiyun pinctrl-0 = <&ao_cec_pins>; 183*4882a593Smuzhiyun pinctrl-names = "default"; 184*4882a593Smuzhiyun hdmi-phandle = <&hdmi_tx>; 185*4882a593Smuzhiyun}; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun&cvbs_vdac_port { 188*4882a593Smuzhiyun cvbs_vdac_out: endpoint { 189*4882a593Smuzhiyun remote-endpoint = <&cvbs_connector_in>; 190*4882a593Smuzhiyun }; 191*4882a593Smuzhiyun}; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyunðmac { 194*4882a593Smuzhiyun status = "okay"; 195*4882a593Smuzhiyun}; 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun&internal_phy { 198*4882a593Smuzhiyun pinctrl-0 = <ð_link_led_pins>, <ð_act_led_pins>; 199*4882a593Smuzhiyun pinctrl-names = "default"; 200*4882a593Smuzhiyun}; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun&ir { 203*4882a593Smuzhiyun status = "okay"; 204*4882a593Smuzhiyun pinctrl-0 = <&remote_input_ao_pins>; 205*4882a593Smuzhiyun pinctrl-names = "default"; 206*4882a593Smuzhiyun}; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun&hdmi_tx { 209*4882a593Smuzhiyun status = "okay"; 210*4882a593Smuzhiyun pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; 211*4882a593Smuzhiyun pinctrl-names = "default"; 212*4882a593Smuzhiyun}; 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun&hdmi_tx_tmds_port { 215*4882a593Smuzhiyun hdmi_tx_tmds_out: endpoint { 216*4882a593Smuzhiyun remote-endpoint = <&hdmi_connector_in>; 217*4882a593Smuzhiyun }; 218*4882a593Smuzhiyun}; 219*4882a593Smuzhiyun 220*4882a593Smuzhiyun&gpio_ao { 221*4882a593Smuzhiyun gpio-line-names = "UART TX", 222*4882a593Smuzhiyun "UART RX", 223*4882a593Smuzhiyun "7J1 Header Pin31", 224*4882a593Smuzhiyun "", "", "", "", 225*4882a593Smuzhiyun "IR In", 226*4882a593Smuzhiyun "HDMI CEC", 227*4882a593Smuzhiyun "5V VCCK Regulator", 228*4882a593Smuzhiyun /* GPIO_TEST_N */ 229*4882a593Smuzhiyun ""; 230*4882a593Smuzhiyun}; 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun&gpio { 233*4882a593Smuzhiyun gpio-line-names = /* Bank GPIOZ */ 234*4882a593Smuzhiyun "", "", "", "", "", "", "", 235*4882a593Smuzhiyun "", "", "", "", "", "", "", 236*4882a593Smuzhiyun "Eth Link LED", "Eth Activity LED", 237*4882a593Smuzhiyun /* Bank GPIOH */ 238*4882a593Smuzhiyun "HDMI HPD", "HDMI SDA", "HDMI SCL", 239*4882a593Smuzhiyun "", "7J1 Header Pin13", 240*4882a593Smuzhiyun "7J1 Header Pin15", 241*4882a593Smuzhiyun "7J1 Header Pin7", 242*4882a593Smuzhiyun "7J1 Header Pin12", 243*4882a593Smuzhiyun "7J1 Header Pin16", 244*4882a593Smuzhiyun "7J1 Header Pin18", 245*4882a593Smuzhiyun /* Bank BOOT */ 246*4882a593Smuzhiyun "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", 247*4882a593Smuzhiyun "eMMC D4", "eMMC D5", "eMMC D6", "eMMC D7", 248*4882a593Smuzhiyun "eMMC Clk", "eMMC Reset", "eMMC CMD", 249*4882a593Smuzhiyun "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk", 250*4882a593Smuzhiyun "", "SPI NOR Chip Select", 251*4882a593Smuzhiyun /* Bank CARD */ 252*4882a593Smuzhiyun "", "", "", "", "", "", "", 253*4882a593Smuzhiyun /* Bank GPIODV */ 254*4882a593Smuzhiyun "", "", "", "", "", "", "", "", "", "", "", "", 255*4882a593Smuzhiyun "", "", "", "", "", "", "", "", "", "", "", "", 256*4882a593Smuzhiyun "7J1 Header Pin27", "7J1 Header Pin28", "", 257*4882a593Smuzhiyun "7J1 Header Pin29", 258*4882a593Smuzhiyun "VCCK Regulator", "VDDEE Regulator", 259*4882a593Smuzhiyun /* Bank GPIOX */ 260*4882a593Smuzhiyun "7J1 Header Pin22", "7J1 Header Pin26", 261*4882a593Smuzhiyun "7J1 Header Pin36", "7J1 Header Pin38", 262*4882a593Smuzhiyun "7J1 Header Pin40", "7J1 Header Pin37", 263*4882a593Smuzhiyun "7J1 Header Pin33", "7J1 Header Pin35", 264*4882a593Smuzhiyun "7J1 Header Pin19", "7J1 Header Pin21", 265*4882a593Smuzhiyun "7J1 Header Pin24", "7J1 Header Pin23", 266*4882a593Smuzhiyun "7J1 Header Pin8", "7J1 Header Pin10", 267*4882a593Smuzhiyun "", "", "7J1 Header Pin32", "", "", 268*4882a593Smuzhiyun /* Bank GPIOCLK */ 269*4882a593Smuzhiyun "", ""; 270*4882a593Smuzhiyun}; 271*4882a593Smuzhiyun 272*4882a593Smuzhiyun&saradc { 273*4882a593Smuzhiyun status = "okay"; 274*4882a593Smuzhiyun vref-supply = <&vddio_boot>; 275*4882a593Smuzhiyun}; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun/* eMMC */ 278*4882a593Smuzhiyun&sd_emmc_c { 279*4882a593Smuzhiyun status = "okay"; 280*4882a593Smuzhiyun pinctrl-0 = <&emmc_pins>; 281*4882a593Smuzhiyun pinctrl-1 = <&emmc_clk_gate_pins>; 282*4882a593Smuzhiyun pinctrl-names = "default", "clk-gate"; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun bus-width = <8>; 285*4882a593Smuzhiyun cap-mmc-highspeed; 286*4882a593Smuzhiyun mmc-ddr-1_8v; 287*4882a593Smuzhiyun mmc-hs200-1_8v; 288*4882a593Smuzhiyun max-frequency = <200000000>; 289*4882a593Smuzhiyun disable-wp; 290*4882a593Smuzhiyun 291*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 292*4882a593Smuzhiyun vmmc-supply = <&vcc_3v3>; 293*4882a593Smuzhiyun vqmmc-supply = <&vddio_boot>; 294*4882a593Smuzhiyun}; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun&spifc { 297*4882a593Smuzhiyun status = "okay"; 298*4882a593Smuzhiyun pinctrl-0 = <&nor_pins>; 299*4882a593Smuzhiyun pinctrl-names = "default"; 300*4882a593Smuzhiyun 301*4882a593Smuzhiyun w25q32: spi-flash@0 { 302*4882a593Smuzhiyun #address-cells = <1>; 303*4882a593Smuzhiyun #size-cells = <1>; 304*4882a593Smuzhiyun compatible = "jedec,spi-nor"; 305*4882a593Smuzhiyun reg = <0>; 306*4882a593Smuzhiyun spi-max-frequency = <3000000>; 307*4882a593Smuzhiyun }; 308*4882a593Smuzhiyun}; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun&uart_AO { 311*4882a593Smuzhiyun status = "okay"; 312*4882a593Smuzhiyun pinctrl-0 = <&uart_ao_a_pins>; 313*4882a593Smuzhiyun pinctrl-names = "default"; 314*4882a593Smuzhiyun}; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun&usb { 317*4882a593Smuzhiyun status = "okay"; 318*4882a593Smuzhiyun dr_mode = "host"; 319*4882a593Smuzhiyun}; 320