xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/meson-gx.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2016 Andreas Färber
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2016 BayLibre, SAS.
6*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@baylibre.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright (c) 2016 Endless Computers, Inc.
9*4882a593Smuzhiyun * Author: Carlo Caione <carlo@endlessm.com>
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
13*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
14*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/arm-gic.h>
15*4882a593Smuzhiyun#include <dt-bindings/power/meson-gxbb-power.h>
16*4882a593Smuzhiyun#include <dt-bindings/thermal/thermal.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun/ {
19*4882a593Smuzhiyun	interrupt-parent = <&gic>;
20*4882a593Smuzhiyun	#address-cells = <2>;
21*4882a593Smuzhiyun	#size-cells = <2>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	reserved-memory {
24*4882a593Smuzhiyun		#address-cells = <2>;
25*4882a593Smuzhiyun		#size-cells = <2>;
26*4882a593Smuzhiyun		ranges;
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		/* 16 MiB reserved for Hardware ROM Firmware */
29*4882a593Smuzhiyun		hwrom_reserved: hwrom@0 {
30*4882a593Smuzhiyun			reg = <0x0 0x0 0x0 0x1000000>;
31*4882a593Smuzhiyun			no-map;
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
35*4882a593Smuzhiyun		secmon_reserved: secmon@10000000 {
36*4882a593Smuzhiyun			reg = <0x0 0x10000000 0x0 0x200000>;
37*4882a593Smuzhiyun			no-map;
38*4882a593Smuzhiyun		};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
41*4882a593Smuzhiyun		secmon_reserved_alt: secmon@5000000 {
42*4882a593Smuzhiyun			reg = <0x0 0x05000000 0x0 0x300000>;
43*4882a593Smuzhiyun			no-map;
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		/* 32 MiB reserved for ARM Trusted Firmware (BL32) */
47*4882a593Smuzhiyun		secmon_reserved_bl32: secmon@5300000 {
48*4882a593Smuzhiyun			reg = <0x0 0x05300000 0x0 0x2000000>;
49*4882a593Smuzhiyun			no-map;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		linux,cma {
53*4882a593Smuzhiyun			compatible = "shared-dma-pool";
54*4882a593Smuzhiyun			reusable;
55*4882a593Smuzhiyun			size = <0x0 0x10000000>;
56*4882a593Smuzhiyun			alignment = <0x0 0x400000>;
57*4882a593Smuzhiyun			linux,cma-default;
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	chosen {
62*4882a593Smuzhiyun		#address-cells = <2>;
63*4882a593Smuzhiyun		#size-cells = <2>;
64*4882a593Smuzhiyun		ranges;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		simplefb_cvbs: framebuffer-cvbs {
67*4882a593Smuzhiyun			compatible = "amlogic,simple-framebuffer",
68*4882a593Smuzhiyun				     "simple-framebuffer";
69*4882a593Smuzhiyun			amlogic,pipeline = "vpu-cvbs";
70*4882a593Smuzhiyun			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
71*4882a593Smuzhiyun			status = "disabled";
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		simplefb_hdmi: framebuffer-hdmi {
75*4882a593Smuzhiyun			compatible = "amlogic,simple-framebuffer",
76*4882a593Smuzhiyun				     "simple-framebuffer";
77*4882a593Smuzhiyun			amlogic,pipeline = "vpu-hdmi";
78*4882a593Smuzhiyun			power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
79*4882a593Smuzhiyun			status = "disabled";
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	cpus {
84*4882a593Smuzhiyun		#address-cells = <0x2>;
85*4882a593Smuzhiyun		#size-cells = <0x0>;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun		cpu0: cpu@0 {
88*4882a593Smuzhiyun			device_type = "cpu";
89*4882a593Smuzhiyun			compatible = "arm,cortex-a53";
90*4882a593Smuzhiyun			reg = <0x0 0x0>;
91*4882a593Smuzhiyun			enable-method = "psci";
92*4882a593Smuzhiyun			next-level-cache = <&l2>;
93*4882a593Smuzhiyun			clocks = <&scpi_dvfs 0>;
94*4882a593Smuzhiyun			#cooling-cells = <2>;
95*4882a593Smuzhiyun		};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun		cpu1: cpu@1 {
98*4882a593Smuzhiyun			device_type = "cpu";
99*4882a593Smuzhiyun			compatible = "arm,cortex-a53";
100*4882a593Smuzhiyun			reg = <0x0 0x1>;
101*4882a593Smuzhiyun			enable-method = "psci";
102*4882a593Smuzhiyun			next-level-cache = <&l2>;
103*4882a593Smuzhiyun			clocks = <&scpi_dvfs 0>;
104*4882a593Smuzhiyun			#cooling-cells = <2>;
105*4882a593Smuzhiyun		};
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun		cpu2: cpu@2 {
108*4882a593Smuzhiyun			device_type = "cpu";
109*4882a593Smuzhiyun			compatible = "arm,cortex-a53";
110*4882a593Smuzhiyun			reg = <0x0 0x2>;
111*4882a593Smuzhiyun			enable-method = "psci";
112*4882a593Smuzhiyun			next-level-cache = <&l2>;
113*4882a593Smuzhiyun			clocks = <&scpi_dvfs 0>;
114*4882a593Smuzhiyun			#cooling-cells = <2>;
115*4882a593Smuzhiyun		};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun		cpu3: cpu@3 {
118*4882a593Smuzhiyun			device_type = "cpu";
119*4882a593Smuzhiyun			compatible = "arm,cortex-a53";
120*4882a593Smuzhiyun			reg = <0x0 0x3>;
121*4882a593Smuzhiyun			enable-method = "psci";
122*4882a593Smuzhiyun			next-level-cache = <&l2>;
123*4882a593Smuzhiyun			clocks = <&scpi_dvfs 0>;
124*4882a593Smuzhiyun			#cooling-cells = <2>;
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		l2: l2-cache0 {
128*4882a593Smuzhiyun			compatible = "cache";
129*4882a593Smuzhiyun		};
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	thermal-zones {
133*4882a593Smuzhiyun		cpu-thermal {
134*4882a593Smuzhiyun			polling-delay-passive = <250>; /* milliseconds */
135*4882a593Smuzhiyun			polling-delay = <1000>; /* milliseconds */
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun			thermal-sensors = <&scpi_sensors 0>;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun			trips {
140*4882a593Smuzhiyun				cpu_passive: cpu-passive {
141*4882a593Smuzhiyun					temperature = <80000>; /* millicelsius */
142*4882a593Smuzhiyun					hysteresis = <2000>; /* millicelsius */
143*4882a593Smuzhiyun					type = "passive";
144*4882a593Smuzhiyun				};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun				cpu_hot: cpu-hot {
147*4882a593Smuzhiyun					temperature = <90000>; /* millicelsius */
148*4882a593Smuzhiyun					hysteresis = <2000>; /* millicelsius */
149*4882a593Smuzhiyun					type = "hot";
150*4882a593Smuzhiyun				};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun				cpu_critical: cpu-critical {
153*4882a593Smuzhiyun					temperature = <110000>; /* millicelsius */
154*4882a593Smuzhiyun					hysteresis = <2000>; /* millicelsius */
155*4882a593Smuzhiyun					type = "critical";
156*4882a593Smuzhiyun				};
157*4882a593Smuzhiyun			};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun			cpu_cooling_maps: cooling-maps {
160*4882a593Smuzhiyun				map0 {
161*4882a593Smuzhiyun					trip = <&cpu_passive>;
162*4882a593Smuzhiyun					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
163*4882a593Smuzhiyun							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
164*4882a593Smuzhiyun							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
165*4882a593Smuzhiyun							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
166*4882a593Smuzhiyun				};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun				map1 {
169*4882a593Smuzhiyun					trip = <&cpu_hot>;
170*4882a593Smuzhiyun					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
171*4882a593Smuzhiyun							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
172*4882a593Smuzhiyun							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
173*4882a593Smuzhiyun							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
174*4882a593Smuzhiyun				};
175*4882a593Smuzhiyun			};
176*4882a593Smuzhiyun		};
177*4882a593Smuzhiyun	};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun	arm-pmu {
180*4882a593Smuzhiyun		compatible = "arm,cortex-a53-pmu";
181*4882a593Smuzhiyun		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
182*4882a593Smuzhiyun			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
183*4882a593Smuzhiyun			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
184*4882a593Smuzhiyun			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
185*4882a593Smuzhiyun		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
186*4882a593Smuzhiyun	};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun	psci {
189*4882a593Smuzhiyun		compatible = "arm,psci-0.2";
190*4882a593Smuzhiyun		method = "smc";
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun	timer {
194*4882a593Smuzhiyun		compatible = "arm,armv8-timer";
195*4882a593Smuzhiyun		interrupts = <GIC_PPI 13
196*4882a593Smuzhiyun			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
197*4882a593Smuzhiyun			     <GIC_PPI 14
198*4882a593Smuzhiyun			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
199*4882a593Smuzhiyun			     <GIC_PPI 11
200*4882a593Smuzhiyun			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
201*4882a593Smuzhiyun			     <GIC_PPI 10
202*4882a593Smuzhiyun			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
203*4882a593Smuzhiyun	};
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun	xtal: xtal-clk {
206*4882a593Smuzhiyun		compatible = "fixed-clock";
207*4882a593Smuzhiyun		clock-frequency = <24000000>;
208*4882a593Smuzhiyun		clock-output-names = "xtal";
209*4882a593Smuzhiyun		#clock-cells = <0>;
210*4882a593Smuzhiyun	};
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun	firmware {
213*4882a593Smuzhiyun		sm: secure-monitor {
214*4882a593Smuzhiyun			compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
215*4882a593Smuzhiyun		};
216*4882a593Smuzhiyun	};
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun	efuse: efuse {
219*4882a593Smuzhiyun		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
220*4882a593Smuzhiyun		#address-cells = <1>;
221*4882a593Smuzhiyun		#size-cells = <1>;
222*4882a593Smuzhiyun		read-only;
223*4882a593Smuzhiyun		secure-monitor = <&sm>;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun		sn: sn@14 {
226*4882a593Smuzhiyun			reg = <0x14 0x10>;
227*4882a593Smuzhiyun		};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun		eth_mac: eth_mac@34 {
230*4882a593Smuzhiyun			reg = <0x34 0x10>;
231*4882a593Smuzhiyun		};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun		bid: bid@46 {
234*4882a593Smuzhiyun			reg = <0x46 0x30>;
235*4882a593Smuzhiyun		};
236*4882a593Smuzhiyun	};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun	scpi {
239*4882a593Smuzhiyun		compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
240*4882a593Smuzhiyun		mboxes = <&mailbox 1 &mailbox 2>;
241*4882a593Smuzhiyun		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun		scpi_clocks: clocks {
244*4882a593Smuzhiyun			compatible = "arm,scpi-clocks";
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun			scpi_dvfs: scpi_clocks@0 {
247*4882a593Smuzhiyun				compatible = "arm,scpi-dvfs-clocks";
248*4882a593Smuzhiyun				#clock-cells = <1>;
249*4882a593Smuzhiyun				clock-indices = <0>;
250*4882a593Smuzhiyun				clock-output-names = "vcpu";
251*4882a593Smuzhiyun			};
252*4882a593Smuzhiyun		};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun		scpi_sensors: sensors {
255*4882a593Smuzhiyun			compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
256*4882a593Smuzhiyun			#thermal-sensor-cells = <1>;
257*4882a593Smuzhiyun		};
258*4882a593Smuzhiyun	};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun	soc {
261*4882a593Smuzhiyun		compatible = "simple-bus";
262*4882a593Smuzhiyun		#address-cells = <2>;
263*4882a593Smuzhiyun		#size-cells = <2>;
264*4882a593Smuzhiyun		ranges;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun		cbus: bus@c1100000 {
267*4882a593Smuzhiyun			compatible = "simple-bus";
268*4882a593Smuzhiyun			reg = <0x0 0xc1100000 0x0 0x100000>;
269*4882a593Smuzhiyun			#address-cells = <2>;
270*4882a593Smuzhiyun			#size-cells = <2>;
271*4882a593Smuzhiyun			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun			gpio_intc: interrupt-controller@9880 {
274*4882a593Smuzhiyun				compatible = "amlogic,meson-gpio-intc";
275*4882a593Smuzhiyun				reg = <0x0 0x9880 0x0 0x10>;
276*4882a593Smuzhiyun				interrupt-controller;
277*4882a593Smuzhiyun				#interrupt-cells = <2>;
278*4882a593Smuzhiyun				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
279*4882a593Smuzhiyun				status = "disabled";
280*4882a593Smuzhiyun			};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun			reset: reset-controller@4404 {
283*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-reset";
284*4882a593Smuzhiyun				reg = <0x0 0x04404 0x0 0x9c>;
285*4882a593Smuzhiyun				#reset-cells = <1>;
286*4882a593Smuzhiyun			};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun			aiu: audio-controller@5400 {
289*4882a593Smuzhiyun				compatible = "amlogic,aiu";
290*4882a593Smuzhiyun				#sound-dai-cells = <2>;
291*4882a593Smuzhiyun				sound-name-prefix = "AIU";
292*4882a593Smuzhiyun				reg = <0x0 0x5400 0x0 0x2ac>;
293*4882a593Smuzhiyun				interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>,
294*4882a593Smuzhiyun					     <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
295*4882a593Smuzhiyun				interrupt-names = "i2s", "spdif";
296*4882a593Smuzhiyun				status = "disabled";
297*4882a593Smuzhiyun			};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun			uart_A: serial@84c0 {
300*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-uart";
301*4882a593Smuzhiyun				reg = <0x0 0x84c0 0x0 0x18>;
302*4882a593Smuzhiyun				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
303*4882a593Smuzhiyun				status = "disabled";
304*4882a593Smuzhiyun			};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun			uart_B: serial@84dc {
307*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-uart";
308*4882a593Smuzhiyun				reg = <0x0 0x84dc 0x0 0x18>;
309*4882a593Smuzhiyun				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
310*4882a593Smuzhiyun				status = "disabled";
311*4882a593Smuzhiyun			};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun			i2c_A: i2c@8500 {
314*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-i2c";
315*4882a593Smuzhiyun				reg = <0x0 0x08500 0x0 0x20>;
316*4882a593Smuzhiyun				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
317*4882a593Smuzhiyun				#address-cells = <1>;
318*4882a593Smuzhiyun				#size-cells = <0>;
319*4882a593Smuzhiyun				status = "disabled";
320*4882a593Smuzhiyun			};
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun			pwm_ab: pwm@8550 {
323*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
324*4882a593Smuzhiyun				reg = <0x0 0x08550 0x0 0x10>;
325*4882a593Smuzhiyun				#pwm-cells = <3>;
326*4882a593Smuzhiyun				status = "disabled";
327*4882a593Smuzhiyun			};
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun			pwm_cd: pwm@8650 {
330*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
331*4882a593Smuzhiyun				reg = <0x0 0x08650 0x0 0x10>;
332*4882a593Smuzhiyun				#pwm-cells = <3>;
333*4882a593Smuzhiyun				status = "disabled";
334*4882a593Smuzhiyun			};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun			saradc: adc@8680 {
337*4882a593Smuzhiyun				compatible = "amlogic,meson-saradc";
338*4882a593Smuzhiyun				reg = <0x0 0x8680 0x0 0x34>;
339*4882a593Smuzhiyun				#io-channel-cells = <1>;
340*4882a593Smuzhiyun				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
341*4882a593Smuzhiyun				status = "disabled";
342*4882a593Smuzhiyun			};
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun			pwm_ef: pwm@86c0 {
345*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
346*4882a593Smuzhiyun				reg = <0x0 0x086c0 0x0 0x10>;
347*4882a593Smuzhiyun				#pwm-cells = <3>;
348*4882a593Smuzhiyun				status = "disabled";
349*4882a593Smuzhiyun			};
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun			uart_C: serial@8700 {
352*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-uart";
353*4882a593Smuzhiyun				reg = <0x0 0x8700 0x0 0x18>;
354*4882a593Smuzhiyun				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
355*4882a593Smuzhiyun				status = "disabled";
356*4882a593Smuzhiyun			};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun			clock-measure@8758 {
359*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-clk-measure";
360*4882a593Smuzhiyun				reg = <0x0 0x8758 0x0 0x10>;
361*4882a593Smuzhiyun			};
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun			i2c_B: i2c@87c0 {
364*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-i2c";
365*4882a593Smuzhiyun				reg = <0x0 0x087c0 0x0 0x20>;
366*4882a593Smuzhiyun				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
367*4882a593Smuzhiyun				#address-cells = <1>;
368*4882a593Smuzhiyun				#size-cells = <0>;
369*4882a593Smuzhiyun				status = "disabled";
370*4882a593Smuzhiyun			};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun			i2c_C: i2c@87e0 {
373*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-i2c";
374*4882a593Smuzhiyun				reg = <0x0 0x087e0 0x0 0x20>;
375*4882a593Smuzhiyun				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
376*4882a593Smuzhiyun				#address-cells = <1>;
377*4882a593Smuzhiyun				#size-cells = <0>;
378*4882a593Smuzhiyun				status = "disabled";
379*4882a593Smuzhiyun			};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun			spicc: spi@8d80 {
382*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-spicc";
383*4882a593Smuzhiyun				reg = <0x0 0x08d80 0x0 0x80>;
384*4882a593Smuzhiyun				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
385*4882a593Smuzhiyun				#address-cells = <1>;
386*4882a593Smuzhiyun				#size-cells = <0>;
387*4882a593Smuzhiyun				status = "disabled";
388*4882a593Smuzhiyun			};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun			spifc: spi@8c80 {
391*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-spifc";
392*4882a593Smuzhiyun				reg = <0x0 0x08c80 0x0 0x80>;
393*4882a593Smuzhiyun				#address-cells = <1>;
394*4882a593Smuzhiyun				#size-cells = <0>;
395*4882a593Smuzhiyun				status = "disabled";
396*4882a593Smuzhiyun			};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun			watchdog@98d0 {
399*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-wdt";
400*4882a593Smuzhiyun				reg = <0x0 0x098d0 0x0 0x10>;
401*4882a593Smuzhiyun				clocks = <&xtal>;
402*4882a593Smuzhiyun			};
403*4882a593Smuzhiyun		};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun		gic: interrupt-controller@c4301000 {
406*4882a593Smuzhiyun			compatible = "arm,gic-400";
407*4882a593Smuzhiyun			reg = <0x0 0xc4301000 0 0x1000>,
408*4882a593Smuzhiyun			      <0x0 0xc4302000 0 0x2000>,
409*4882a593Smuzhiyun			      <0x0 0xc4304000 0 0x2000>,
410*4882a593Smuzhiyun			      <0x0 0xc4306000 0 0x2000>;
411*4882a593Smuzhiyun			interrupt-controller;
412*4882a593Smuzhiyun			interrupts = <GIC_PPI 9
413*4882a593Smuzhiyun				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
414*4882a593Smuzhiyun			#interrupt-cells = <3>;
415*4882a593Smuzhiyun			#address-cells = <0>;
416*4882a593Smuzhiyun		};
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun		sram: sram@c8000000 {
419*4882a593Smuzhiyun			compatible = "mmio-sram";
420*4882a593Smuzhiyun			reg = <0x0 0xc8000000 0x0 0x14000>;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun			#address-cells = <1>;
423*4882a593Smuzhiyun			#size-cells = <1>;
424*4882a593Smuzhiyun			ranges = <0 0x0 0xc8000000 0x14000>;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun			cpu_scp_lpri: scp-sram@0 {
427*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-scp-shmem";
428*4882a593Smuzhiyun				reg = <0x13000 0x400>;
429*4882a593Smuzhiyun			};
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun			cpu_scp_hpri: scp-sram@200 {
432*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-scp-shmem";
433*4882a593Smuzhiyun				reg = <0x13400 0x400>;
434*4882a593Smuzhiyun			};
435*4882a593Smuzhiyun		};
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun		aobus: bus@c8100000 {
438*4882a593Smuzhiyun			compatible = "simple-bus";
439*4882a593Smuzhiyun			reg = <0x0 0xc8100000 0x0 0x100000>;
440*4882a593Smuzhiyun			#address-cells = <2>;
441*4882a593Smuzhiyun			#size-cells = <2>;
442*4882a593Smuzhiyun			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun			sysctrl_AO: sys-ctrl@0 {
445*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
446*4882a593Smuzhiyun				reg =  <0x0 0x0 0x0 0x100>;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun				clkc_AO: clock-controller {
449*4882a593Smuzhiyun					compatible = "amlogic,meson-gx-aoclkc";
450*4882a593Smuzhiyun					#clock-cells = <1>;
451*4882a593Smuzhiyun					#reset-cells = <1>;
452*4882a593Smuzhiyun				};
453*4882a593Smuzhiyun			};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun			cec_AO: cec@100 {
456*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-ao-cec";
457*4882a593Smuzhiyun				reg = <0x0 0x00100 0x0 0x14>;
458*4882a593Smuzhiyun				interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
459*4882a593Smuzhiyun				status = "disabled";
460*4882a593Smuzhiyun			};
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun			sec_AO: ao-secure@140 {
463*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-ao-secure", "syscon";
464*4882a593Smuzhiyun				reg = <0x0 0x140 0x0 0x140>;
465*4882a593Smuzhiyun				amlogic,has-chip-id;
466*4882a593Smuzhiyun			};
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun			uart_AO: serial@4c0 {
469*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
470*4882a593Smuzhiyun				reg = <0x0 0x004c0 0x0 0x18>;
471*4882a593Smuzhiyun				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
472*4882a593Smuzhiyun				status = "disabled";
473*4882a593Smuzhiyun			};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun			uart_AO_B: serial@4e0 {
476*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
477*4882a593Smuzhiyun				reg = <0x0 0x004e0 0x0 0x18>;
478*4882a593Smuzhiyun				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
479*4882a593Smuzhiyun				status = "disabled";
480*4882a593Smuzhiyun			};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun			i2c_AO: i2c@500 {
483*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-i2c";
484*4882a593Smuzhiyun				reg = <0x0 0x500 0x0 0x20>;
485*4882a593Smuzhiyun				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
486*4882a593Smuzhiyun				#address-cells = <1>;
487*4882a593Smuzhiyun				#size-cells = <0>;
488*4882a593Smuzhiyun				status = "disabled";
489*4882a593Smuzhiyun			};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun			pwm_AO_ab: pwm@550 {
492*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
493*4882a593Smuzhiyun				reg = <0x0 0x00550 0x0 0x10>;
494*4882a593Smuzhiyun				#pwm-cells = <3>;
495*4882a593Smuzhiyun				status = "disabled";
496*4882a593Smuzhiyun			};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun			ir: ir@580 {
499*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
500*4882a593Smuzhiyun				reg = <0x0 0x00580 0x0 0x40>;
501*4882a593Smuzhiyun				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
502*4882a593Smuzhiyun				status = "disabled";
503*4882a593Smuzhiyun			};
504*4882a593Smuzhiyun		};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun		vdec: video-codec@c8820000 {
507*4882a593Smuzhiyun			compatible = "amlogic,gx-vdec";
508*4882a593Smuzhiyun			reg = <0x0 0xc8820000 0x0 0x10000>,
509*4882a593Smuzhiyun			      <0x0 0xc110a580 0x0 0xe4>;
510*4882a593Smuzhiyun			reg-names = "dos", "esparser";
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun			interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
513*4882a593Smuzhiyun				     <GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
514*4882a593Smuzhiyun			interrupt-names = "vdec", "esparser";
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun			amlogic,ao-sysctrl = <&sysctrl_AO>;
517*4882a593Smuzhiyun			amlogic,canvas = <&canvas>;
518*4882a593Smuzhiyun		};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun		periphs: bus@c8834000 {
521*4882a593Smuzhiyun			compatible = "simple-bus";
522*4882a593Smuzhiyun			reg = <0x0 0xc8834000 0x0 0x2000>;
523*4882a593Smuzhiyun			#address-cells = <2>;
524*4882a593Smuzhiyun			#size-cells = <2>;
525*4882a593Smuzhiyun			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun			hwrng: rng {
528*4882a593Smuzhiyun				compatible = "amlogic,meson-rng";
529*4882a593Smuzhiyun				reg = <0x0 0x0 0x0 0x4>;
530*4882a593Smuzhiyun			};
531*4882a593Smuzhiyun		};
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun		dmcbus: bus@c8838000 {
534*4882a593Smuzhiyun			compatible = "simple-bus";
535*4882a593Smuzhiyun			reg = <0x0 0xc8838000 0x0 0x400>;
536*4882a593Smuzhiyun			#address-cells = <2>;
537*4882a593Smuzhiyun			#size-cells = <2>;
538*4882a593Smuzhiyun			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun			canvas: video-lut@48 {
541*4882a593Smuzhiyun				compatible = "amlogic,canvas";
542*4882a593Smuzhiyun				reg = <0x0 0x48 0x0 0x14>;
543*4882a593Smuzhiyun			};
544*4882a593Smuzhiyun		};
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun		hiubus: bus@c883c000 {
547*4882a593Smuzhiyun			compatible = "simple-bus";
548*4882a593Smuzhiyun			reg = <0x0 0xc883c000 0x0 0x2000>;
549*4882a593Smuzhiyun			#address-cells = <2>;
550*4882a593Smuzhiyun			#size-cells = <2>;
551*4882a593Smuzhiyun			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun			sysctrl: system-controller@0 {
554*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
555*4882a593Smuzhiyun				reg = <0 0 0 0x400>;
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun				pwrc: power-controller {
558*4882a593Smuzhiyun					compatible = "amlogic,meson-gxbb-pwrc";
559*4882a593Smuzhiyun					#power-domain-cells = <1>;
560*4882a593Smuzhiyun					amlogic,ao-sysctrl = <&sysctrl_AO>;
561*4882a593Smuzhiyun				};
562*4882a593Smuzhiyun			};
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun			mailbox: mailbox@404 {
565*4882a593Smuzhiyun				compatible = "amlogic,meson-gxbb-mhu";
566*4882a593Smuzhiyun				reg = <0 0x404 0 0x4c>;
567*4882a593Smuzhiyun				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
568*4882a593Smuzhiyun					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
569*4882a593Smuzhiyun					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
570*4882a593Smuzhiyun				#mbox-cells = <1>;
571*4882a593Smuzhiyun			};
572*4882a593Smuzhiyun		};
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun		ethmac: ethernet@c9410000 {
575*4882a593Smuzhiyun			compatible = "amlogic,meson-gxbb-dwmac",
576*4882a593Smuzhiyun				     "snps,dwmac-3.70a",
577*4882a593Smuzhiyun				     "snps,dwmac";
578*4882a593Smuzhiyun			reg = <0x0 0xc9410000 0x0 0x10000>,
579*4882a593Smuzhiyun			      <0x0 0xc8834540 0x0 0x4>;
580*4882a593Smuzhiyun			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
581*4882a593Smuzhiyun			interrupt-names = "macirq";
582*4882a593Smuzhiyun			rx-fifo-depth = <4096>;
583*4882a593Smuzhiyun			tx-fifo-depth = <2048>;
584*4882a593Smuzhiyun			power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
585*4882a593Smuzhiyun			status = "disabled";
586*4882a593Smuzhiyun		};
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun		apb: apb@d0000000 {
589*4882a593Smuzhiyun			compatible = "simple-bus";
590*4882a593Smuzhiyun			reg = <0x0 0xd0000000 0x0 0x200000>;
591*4882a593Smuzhiyun			#address-cells = <2>;
592*4882a593Smuzhiyun			#size-cells = <2>;
593*4882a593Smuzhiyun			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun			sd_emmc_a: mmc@70000 {
596*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
597*4882a593Smuzhiyun				reg = <0x0 0x70000 0x0 0x800>;
598*4882a593Smuzhiyun				interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
599*4882a593Smuzhiyun				status = "disabled";
600*4882a593Smuzhiyun			};
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun			sd_emmc_b: mmc@72000 {
603*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
604*4882a593Smuzhiyun				reg = <0x0 0x72000 0x0 0x800>;
605*4882a593Smuzhiyun				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
606*4882a593Smuzhiyun				status = "disabled";
607*4882a593Smuzhiyun			};
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun			sd_emmc_c: mmc@74000 {
610*4882a593Smuzhiyun				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
611*4882a593Smuzhiyun				reg = <0x0 0x74000 0x0 0x800>;
612*4882a593Smuzhiyun				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
613*4882a593Smuzhiyun				status = "disabled";
614*4882a593Smuzhiyun			};
615*4882a593Smuzhiyun		};
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun		vpu: vpu@d0100000 {
618*4882a593Smuzhiyun			compatible = "amlogic,meson-gx-vpu";
619*4882a593Smuzhiyun			reg = <0x0 0xd0100000 0x0 0x100000>,
620*4882a593Smuzhiyun			      <0x0 0xc883c000 0x0 0x1000>;
621*4882a593Smuzhiyun			reg-names = "vpu", "hhi";
622*4882a593Smuzhiyun			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
623*4882a593Smuzhiyun			#address-cells = <1>;
624*4882a593Smuzhiyun			#size-cells = <0>;
625*4882a593Smuzhiyun			amlogic,canvas = <&canvas>;
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun			/* CVBS VDAC output port */
628*4882a593Smuzhiyun			cvbs_vdac_port: port@0 {
629*4882a593Smuzhiyun				reg = <0>;
630*4882a593Smuzhiyun			};
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun			/* HDMI-TX output port */
633*4882a593Smuzhiyun			hdmi_tx_port: port@1 {
634*4882a593Smuzhiyun				reg = <1>;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun				hdmi_tx_out: endpoint {
637*4882a593Smuzhiyun					remote-endpoint = <&hdmi_tx_in>;
638*4882a593Smuzhiyun				};
639*4882a593Smuzhiyun			};
640*4882a593Smuzhiyun		};
641*4882a593Smuzhiyun
642*4882a593Smuzhiyun		hdmi_tx: hdmi-tx@c883a000 {
643*4882a593Smuzhiyun			compatible = "amlogic,meson-gx-dw-hdmi";
644*4882a593Smuzhiyun			reg = <0x0 0xc883a000 0x0 0x1c>;
645*4882a593Smuzhiyun			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
646*4882a593Smuzhiyun			#address-cells = <1>;
647*4882a593Smuzhiyun			#size-cells = <0>;
648*4882a593Smuzhiyun			#sound-dai-cells = <0>;
649*4882a593Smuzhiyun			sound-name-prefix = "HDMITX";
650*4882a593Smuzhiyun			status = "disabled";
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun			/* VPU VENC Input */
653*4882a593Smuzhiyun			hdmi_tx_venc_port: port@0 {
654*4882a593Smuzhiyun				reg = <0>;
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun				hdmi_tx_in: endpoint {
657*4882a593Smuzhiyun					remote-endpoint = <&hdmi_tx_out>;
658*4882a593Smuzhiyun				};
659*4882a593Smuzhiyun			};
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun			/* TMDS Output */
662*4882a593Smuzhiyun			hdmi_tx_tmds_port: port@1 {
663*4882a593Smuzhiyun				reg = <1>;
664*4882a593Smuzhiyun			};
665*4882a593Smuzhiyun		};
666*4882a593Smuzhiyun	};
667*4882a593Smuzhiyun};
668