xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2019 BayLibre, SAS
4*4882a593Smuzhiyun * Author: Neil Armstrong <narmstrong@baylibre.com>
5*4882a593Smuzhiyun * Copyright (c) 2019 Christian Hewitt <christianshewitt@gmail.com>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun#include "meson-g12b-a311d.dtsi"
11*4882a593Smuzhiyun#include "meson-khadas-vim3.dtsi"
12*4882a593Smuzhiyun#include "meson-g12b-khadas-vim3.dtsi"
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun/ {
15*4882a593Smuzhiyun	compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
16*4882a593Smuzhiyun};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun/*
19*4882a593Smuzhiyun * The VIM3 on-board  MCU can mux the PCIe/USB3.0 shared differential
20*4882a593Smuzhiyun * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
21*4882a593Smuzhiyun * an USB3.0 Type A connector and a M.2 Key M slot.
22*4882a593Smuzhiyun * The PHY driving these differential lines is shared between
23*4882a593Smuzhiyun * the USB3.0 controller and the PCIe Controller, thus only
24*4882a593Smuzhiyun * a single controller can use it.
25*4882a593Smuzhiyun * If the MCU is configured to mux the PCIe/USB3.0 differential lines
26*4882a593Smuzhiyun * to the M.2 Key M slot, uncomment the following block to disable
27*4882a593Smuzhiyun * USB3.0 from the USB Complex and enable the PCIe controller.
28*4882a593Smuzhiyun * The End User is not expected to uncomment the following except for
29*4882a593Smuzhiyun * testing purposes, but instead rely on the firmware/bootloader to
30*4882a593Smuzhiyun * update these nodes accordingly if PCIe mode is selected by the MCU.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun/*
33*4882a593Smuzhiyun&pcie {
34*4882a593Smuzhiyun	status = "okay";
35*4882a593Smuzhiyun};
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun&usb {
38*4882a593Smuzhiyun	phys = <&usb2_phy0>, <&usb2_phy1>;
39*4882a593Smuzhiyun	phy-names = "usb2-phy0", "usb2-phy1";
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun */
42