1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org> 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun/ { 5*4882a593Smuzhiyun cpu_opp_table: opp-table-cpu { 6*4882a593Smuzhiyun compatible = "operating-points-v2"; 7*4882a593Smuzhiyun opp-shared; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun opp-408000000 { 10*4882a593Smuzhiyun opp-hz = /bits/ 64 <408000000>; 11*4882a593Smuzhiyun opp-microvolt = <1000000 1000000 1310000>; 12*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 13*4882a593Smuzhiyun }; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun opp-648000000 { 16*4882a593Smuzhiyun opp-hz = /bits/ 64 <648000000>; 17*4882a593Smuzhiyun opp-microvolt = <1040000 1040000 1310000>; 18*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 19*4882a593Smuzhiyun }; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun opp-816000000 { 22*4882a593Smuzhiyun opp-hz = /bits/ 64 <816000000>; 23*4882a593Smuzhiyun opp-microvolt = <1080000 1080000 1310000>; 24*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun opp-912000000 { 28*4882a593Smuzhiyun opp-hz = /bits/ 64 <912000000>; 29*4882a593Smuzhiyun opp-microvolt = <1120000 1120000 1310000>; 30*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun opp-960000000 { 34*4882a593Smuzhiyun opp-hz = /bits/ 64 <960000000>; 35*4882a593Smuzhiyun opp-microvolt = <1160000 1160000 1310000>; 36*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun opp-1008000000 { 40*4882a593Smuzhiyun opp-hz = /bits/ 64 <1008000000>; 41*4882a593Smuzhiyun opp-microvolt = <1200000 1200000 1310000>; 42*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun opp-1056000000 { 46*4882a593Smuzhiyun opp-hz = /bits/ 64 <1056000000>; 47*4882a593Smuzhiyun opp-microvolt = <1240000 1240000 1310000>; 48*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun opp-1104000000 { 52*4882a593Smuzhiyun opp-hz = /bits/ 64 <1104000000>; 53*4882a593Smuzhiyun opp-microvolt = <1260000 1260000 1310000>; 54*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 55*4882a593Smuzhiyun }; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun opp-1152000000 { 58*4882a593Smuzhiyun opp-hz = /bits/ 64 <1152000000>; 59*4882a593Smuzhiyun opp-microvolt = <1300000 1300000 1310000>; 60*4882a593Smuzhiyun clock-latency-ns = <244144>; /* 8 32k periods */ 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun}; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun&cpu0 { 66*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&cpu1 { 70*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun&cpu2 { 74*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&cpu3 { 78*4882a593Smuzhiyun operating-points-v2 = <&cpu_opp_table>; 79*4882a593Smuzhiyun}; 80