xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun// Copyright (c) 2016 ARM Ltd.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun/dts-v1/;
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "sun50i-a64.dtsi"
7*4882a593Smuzhiyun#include "sun50i-a64-cpu-opp.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "Pine64";
13*4882a593Smuzhiyun	compatible = "pine64,pine64", "allwinner,sun50i-a64";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	aliases {
16*4882a593Smuzhiyun		ethernet0 = &emac;
17*4882a593Smuzhiyun		serial0 = &uart0;
18*4882a593Smuzhiyun		serial1 = &uart1;
19*4882a593Smuzhiyun		serial2 = &uart2;
20*4882a593Smuzhiyun		serial3 = &uart3;
21*4882a593Smuzhiyun		serial4 = &uart4;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	chosen {
25*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	hdmi-connector {
29*4882a593Smuzhiyun		compatible = "hdmi-connector";
30*4882a593Smuzhiyun		type = "a";
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		port {
33*4882a593Smuzhiyun			hdmi_con_in: endpoint {
34*4882a593Smuzhiyun				remote-endpoint = <&hdmi_out_con>;
35*4882a593Smuzhiyun			};
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun	};
38*4882a593Smuzhiyun};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun&codec {
41*4882a593Smuzhiyun	status = "okay";
42*4882a593Smuzhiyun};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun&codec_analog {
45*4882a593Smuzhiyun	cpvdd-supply = <&reg_eldo1>;
46*4882a593Smuzhiyun	status = "okay";
47*4882a593Smuzhiyun};
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun&cpu0 {
50*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
51*4882a593Smuzhiyun};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun&cpu1 {
54*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun&cpu2 {
58*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
59*4882a593Smuzhiyun};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun&cpu3 {
62*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
63*4882a593Smuzhiyun};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun&dai {
66*4882a593Smuzhiyun	status = "okay";
67*4882a593Smuzhiyun};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun&de {
70*4882a593Smuzhiyun	status = "okay";
71*4882a593Smuzhiyun};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun&ehci0 {
74*4882a593Smuzhiyun	status = "okay";
75*4882a593Smuzhiyun};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun&ehci1 {
78*4882a593Smuzhiyun	status = "okay";
79*4882a593Smuzhiyun};
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun&emac {
82*4882a593Smuzhiyun	pinctrl-names = "default";
83*4882a593Smuzhiyun	pinctrl-0 = <&rmii_pins>;
84*4882a593Smuzhiyun	phy-mode = "rmii";
85*4882a593Smuzhiyun	phy-handle = <&ext_rmii_phy1>;
86*4882a593Smuzhiyun	phy-supply = <&reg_dc1sw>;
87*4882a593Smuzhiyun	status = "okay";
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun&hdmi {
92*4882a593Smuzhiyun	hvcc-supply = <&reg_dldo1>;
93*4882a593Smuzhiyun	status = "okay";
94*4882a593Smuzhiyun};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun&hdmi_out {
97*4882a593Smuzhiyun	hdmi_out_con: endpoint {
98*4882a593Smuzhiyun		remote-endpoint = <&hdmi_con_in>;
99*4882a593Smuzhiyun	};
100*4882a593Smuzhiyun};
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun&i2c1 {
103*4882a593Smuzhiyun	status = "okay";
104*4882a593Smuzhiyun};
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun&i2c1_pins {
107*4882a593Smuzhiyun	bias-pull-up;
108*4882a593Smuzhiyun};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun&mdio {
111*4882a593Smuzhiyun	ext_rmii_phy1: ethernet-phy@1 {
112*4882a593Smuzhiyun		compatible = "ethernet-phy-ieee802.3-c22";
113*4882a593Smuzhiyun		reg = <1>;
114*4882a593Smuzhiyun	};
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&mmc0 {
118*4882a593Smuzhiyun	pinctrl-names = "default";
119*4882a593Smuzhiyun	pinctrl-0 = <&mmc0_pins>;
120*4882a593Smuzhiyun	vmmc-supply = <&reg_dcdc1>;
121*4882a593Smuzhiyun	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
122*4882a593Smuzhiyun	disable-wp;
123*4882a593Smuzhiyun	bus-width = <4>;
124*4882a593Smuzhiyun	status = "okay";
125*4882a593Smuzhiyun};
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun&ohci0 {
128*4882a593Smuzhiyun	status = "okay";
129*4882a593Smuzhiyun};
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun&ohci1 {
132*4882a593Smuzhiyun	status = "okay";
133*4882a593Smuzhiyun};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun&r_rsb {
136*4882a593Smuzhiyun	status = "okay";
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun	axp803: pmic@3a3 {
139*4882a593Smuzhiyun		compatible = "x-powers,axp803";
140*4882a593Smuzhiyun		reg = <0x3a3>;
141*4882a593Smuzhiyun		interrupt-parent = <&r_intc>;
142*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun#include "axp803.dtsi"
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun&ac_power_supply {
149*4882a593Smuzhiyun	status = "okay";
150*4882a593Smuzhiyun};
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun&battery_power_supply {
153*4882a593Smuzhiyun	status = "okay";
154*4882a593Smuzhiyun};
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun&reg_aldo2 {
157*4882a593Smuzhiyun	regulator-always-on;
158*4882a593Smuzhiyun	regulator-min-microvolt = <1800000>;
159*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
160*4882a593Smuzhiyun	regulator-name = "vcc-pl";
161*4882a593Smuzhiyun};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun&reg_aldo3 {
164*4882a593Smuzhiyun	regulator-always-on;
165*4882a593Smuzhiyun	regulator-min-microvolt = <3000000>;
166*4882a593Smuzhiyun	regulator-max-microvolt = <3000000>;
167*4882a593Smuzhiyun	regulator-name = "vcc-pll-avcc";
168*4882a593Smuzhiyun};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun&reg_dc1sw {
171*4882a593Smuzhiyun	regulator-name = "vcc-phy";
172*4882a593Smuzhiyun};
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun&reg_dcdc1 {
175*4882a593Smuzhiyun	regulator-always-on;
176*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
177*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
178*4882a593Smuzhiyun	regulator-name = "vcc-3v3";
179*4882a593Smuzhiyun};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun&reg_dcdc2 {
182*4882a593Smuzhiyun	regulator-always-on;
183*4882a593Smuzhiyun	regulator-min-microvolt = <1040000>;
184*4882a593Smuzhiyun	regulator-max-microvolt = <1300000>;
185*4882a593Smuzhiyun	regulator-name = "vdd-cpux";
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun/* DCDC3 is polyphased with DCDC2 */
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun/*
191*4882a593Smuzhiyun * The DRAM chips used by Pine64 boards are DDR3L-compatible, so they can
192*4882a593Smuzhiyun * work at 1.35V with less power consumption.
193*4882a593Smuzhiyun * As AXP803 DCDC5 cannot reach 1.35V accurately, use 1.36V instead.
194*4882a593Smuzhiyun */
195*4882a593Smuzhiyun&reg_dcdc5 {
196*4882a593Smuzhiyun	regulator-always-on;
197*4882a593Smuzhiyun	regulator-min-microvolt = <1360000>;
198*4882a593Smuzhiyun	regulator-max-microvolt = <1360000>;
199*4882a593Smuzhiyun	regulator-name = "vcc-dram";
200*4882a593Smuzhiyun};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun&reg_dcdc6 {
203*4882a593Smuzhiyun	regulator-always-on;
204*4882a593Smuzhiyun	regulator-min-microvolt = <1100000>;
205*4882a593Smuzhiyun	regulator-max-microvolt = <1100000>;
206*4882a593Smuzhiyun	regulator-name = "vdd-sys";
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun&reg_dldo1 {
210*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
211*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
212*4882a593Smuzhiyun	regulator-name = "vcc-hdmi";
213*4882a593Smuzhiyun};
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun&reg_dldo2 {
216*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
217*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
218*4882a593Smuzhiyun	regulator-name = "vcc-mipi";
219*4882a593Smuzhiyun};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun&reg_dldo4 {
222*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
223*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
224*4882a593Smuzhiyun	regulator-name = "vcc-wifi";
225*4882a593Smuzhiyun};
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun&reg_eldo1 {
228*4882a593Smuzhiyun	regulator-min-microvolt = <1800000>;
229*4882a593Smuzhiyun	regulator-max-microvolt = <1800000>;
230*4882a593Smuzhiyun	regulator-name = "cpvdd";
231*4882a593Smuzhiyun};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun&reg_fldo1 {
234*4882a593Smuzhiyun	regulator-min-microvolt = <1200000>;
235*4882a593Smuzhiyun	regulator-max-microvolt = <1200000>;
236*4882a593Smuzhiyun	regulator-name = "vcc-1v2-hsic";
237*4882a593Smuzhiyun};
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun/*
240*4882a593Smuzhiyun * The A64 chip cannot work without this regulator off, although
241*4882a593Smuzhiyun * it seems to be only driving the AR100 core.
242*4882a593Smuzhiyun * Maybe we don't still know well about CPUs domain.
243*4882a593Smuzhiyun */
244*4882a593Smuzhiyun&reg_fldo2 {
245*4882a593Smuzhiyun	regulator-always-on;
246*4882a593Smuzhiyun	regulator-min-microvolt = <1100000>;
247*4882a593Smuzhiyun	regulator-max-microvolt = <1100000>;
248*4882a593Smuzhiyun	regulator-name = "vdd-cpus";
249*4882a593Smuzhiyun};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun&reg_rtc_ldo {
252*4882a593Smuzhiyun	regulator-name = "vcc-rtc";
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&simplefb_hdmi {
256*4882a593Smuzhiyun	vcc-hdmi-supply = <&reg_dldo1>;
257*4882a593Smuzhiyun};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun&sound {
260*4882a593Smuzhiyun	simple-audio-card,aux-devs = <&codec_analog>;
261*4882a593Smuzhiyun	simple-audio-card,widgets = "Microphone", "Microphone Jack",
262*4882a593Smuzhiyun				    "Headphone", "Headphone Jack";
263*4882a593Smuzhiyun	simple-audio-card,routing =
264*4882a593Smuzhiyun			"Left DAC", "DACL",
265*4882a593Smuzhiyun			"Right DAC", "DACR",
266*4882a593Smuzhiyun			"Headphone Jack", "HP",
267*4882a593Smuzhiyun			"ADCL", "Left ADC",
268*4882a593Smuzhiyun			"ADCR", "Right ADC",
269*4882a593Smuzhiyun			"MIC2", "Microphone Jack";
270*4882a593Smuzhiyun	status = "okay";
271*4882a593Smuzhiyun};
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun/* On Euler connector */
274*4882a593Smuzhiyun&spdif {
275*4882a593Smuzhiyun	status = "disabled";
276*4882a593Smuzhiyun};
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun/* On Exp and Euler connectors */
279*4882a593Smuzhiyun&uart0 {
280*4882a593Smuzhiyun	pinctrl-names = "default";
281*4882a593Smuzhiyun	pinctrl-0 = <&uart0_pb_pins>;
282*4882a593Smuzhiyun	status = "okay";
283*4882a593Smuzhiyun};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun/* On Wifi/BT connector, with RTS/CTS */
286*4882a593Smuzhiyun&uart1 {
287*4882a593Smuzhiyun	pinctrl-names = "default";
288*4882a593Smuzhiyun	pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
289*4882a593Smuzhiyun	status = "disabled";
290*4882a593Smuzhiyun};
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun/* On Pi-2 connector */
293*4882a593Smuzhiyun&uart2 {
294*4882a593Smuzhiyun	pinctrl-names = "default";
295*4882a593Smuzhiyun	pinctrl-0 = <&uart2_pins>;
296*4882a593Smuzhiyun	status = "disabled";
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun/* On Euler connector */
300*4882a593Smuzhiyun&uart3 {
301*4882a593Smuzhiyun	pinctrl-names = "default";
302*4882a593Smuzhiyun	pinctrl-0 = <&uart3_pins>;
303*4882a593Smuzhiyun	status = "disabled";
304*4882a593Smuzhiyun};
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun/* On Euler connector, RTS/CTS optional */
307*4882a593Smuzhiyun&uart4 {
308*4882a593Smuzhiyun	pinctrl-names = "default";
309*4882a593Smuzhiyun	pinctrl-0 = <&uart4_pins>;
310*4882a593Smuzhiyun	status = "disabled";
311*4882a593Smuzhiyun};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun&usb_otg {
314*4882a593Smuzhiyun	dr_mode = "host";
315*4882a593Smuzhiyun	status = "okay";
316*4882a593Smuzhiyun};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun&usbphy {
319*4882a593Smuzhiyun	status = "okay";
320*4882a593Smuzhiyun};
321