xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun/dts-v1/;
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "sun50i-a64.dtsi"
7*4882a593Smuzhiyun#include "sun50i-a64-cpu-opp.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "FriendlyARM NanoPi A64";
13*4882a593Smuzhiyun	compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	aliases {
16*4882a593Smuzhiyun		ethernet0 = &emac;
17*4882a593Smuzhiyun		serial0 = &uart0;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	chosen {
21*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	hdmi-connector {
25*4882a593Smuzhiyun		compatible = "hdmi-connector";
26*4882a593Smuzhiyun		type = "a";
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun		port {
29*4882a593Smuzhiyun			hdmi_con_in: endpoint {
30*4882a593Smuzhiyun				remote-endpoint = <&hdmi_out_con>;
31*4882a593Smuzhiyun			};
32*4882a593Smuzhiyun		};
33*4882a593Smuzhiyun	};
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun	leds {
36*4882a593Smuzhiyun		compatible = "gpio-leds";
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		blue {
39*4882a593Smuzhiyun			label = "nanopi-a64:blue:status";
40*4882a593Smuzhiyun			gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
41*4882a593Smuzhiyun		};
42*4882a593Smuzhiyun	};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun	wifi_pwrseq: wifi_pwrseq {
45*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
46*4882a593Smuzhiyun		clocks = <&rtc 1>;
47*4882a593Smuzhiyun		clock-names = "ext_clock";
48*4882a593Smuzhiyun		reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun&cpu0 {
53*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
54*4882a593Smuzhiyun};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun&cpu1 {
57*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
58*4882a593Smuzhiyun};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun&cpu2 {
61*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&cpu3 {
65*4882a593Smuzhiyun	cpu-supply = <&reg_dcdc2>;
66*4882a593Smuzhiyun};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun&de {
69*4882a593Smuzhiyun	status = "okay";
70*4882a593Smuzhiyun};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun&ehci0 {
73*4882a593Smuzhiyun	status = "okay";
74*4882a593Smuzhiyun};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun&ehci1 {
77*4882a593Smuzhiyun	status = "okay";
78*4882a593Smuzhiyun};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun&emac {
81*4882a593Smuzhiyun	pinctrl-names = "default";
82*4882a593Smuzhiyun	pinctrl-0 = <&rgmii_pins>;
83*4882a593Smuzhiyun	phy-mode = "rgmii";
84*4882a593Smuzhiyun	phy-handle = <&ext_rgmii_phy>;
85*4882a593Smuzhiyun	phy-supply = <&reg_dcdc1>;
86*4882a593Smuzhiyun	status = "okay";
87*4882a593Smuzhiyun};
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun&hdmi {
90*4882a593Smuzhiyun	hvcc-supply = <&reg_dldo1>;
91*4882a593Smuzhiyun	status = "okay";
92*4882a593Smuzhiyun};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun&hdmi_out {
95*4882a593Smuzhiyun	hdmi_out_con: endpoint {
96*4882a593Smuzhiyun		remote-endpoint = <&hdmi_con_in>;
97*4882a593Smuzhiyun	};
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun/* i2c1 connected with gpio headers like pine64, bananapi */
101*4882a593Smuzhiyun&i2c1_pins {
102*4882a593Smuzhiyun	bias-pull-up;
103*4882a593Smuzhiyun};
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun&mdio {
106*4882a593Smuzhiyun	ext_rgmii_phy: ethernet-phy@1 {
107*4882a593Smuzhiyun		compatible = "ethernet-phy-ieee802.3-c22";
108*4882a593Smuzhiyun		reg = <7>;
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun};
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun&mmc0 {
113*4882a593Smuzhiyun	pinctrl-names = "default";
114*4882a593Smuzhiyun	pinctrl-0 = <&mmc0_pins>;
115*4882a593Smuzhiyun	vmmc-supply = <&reg_dcdc1>;
116*4882a593Smuzhiyun	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
117*4882a593Smuzhiyun	disable-wp;
118*4882a593Smuzhiyun	bus-width = <4>;
119*4882a593Smuzhiyun	status = "okay";
120*4882a593Smuzhiyun};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun&mmc1 {
123*4882a593Smuzhiyun	pinctrl-names = "default";
124*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins>;
125*4882a593Smuzhiyun	vmmc-supply = <&reg_dcdc1>;
126*4882a593Smuzhiyun	vqmmc-supply = <&reg_dldo4>;
127*4882a593Smuzhiyun	mmc-pwrseq = <&wifi_pwrseq>;
128*4882a593Smuzhiyun	bus-width = <4>;
129*4882a593Smuzhiyun	non-removable;
130*4882a593Smuzhiyun	status = "okay";
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	rtl8189etv: wifi@1 {
133*4882a593Smuzhiyun		reg = <1>;
134*4882a593Smuzhiyun		interrupt-parent = <&r_pio>;
135*4882a593Smuzhiyun		interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
136*4882a593Smuzhiyun		interrupt-names = "host-wake";
137*4882a593Smuzhiyun	};
138*4882a593Smuzhiyun};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun&ohci0 {
141*4882a593Smuzhiyun	status = "okay";
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun&ohci1 {
145*4882a593Smuzhiyun	status = "okay";
146*4882a593Smuzhiyun};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun&r_rsb {
149*4882a593Smuzhiyun	status = "okay";
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun	axp803: pmic@3a3 {
152*4882a593Smuzhiyun		compatible = "x-powers,axp803";
153*4882a593Smuzhiyun		reg = <0x3a3>;
154*4882a593Smuzhiyun		interrupt-parent = <&r_intc>;
155*4882a593Smuzhiyun		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
156*4882a593Smuzhiyun	};
157*4882a593Smuzhiyun};
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun#include "axp803.dtsi"
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun&ac_power_supply {
162*4882a593Smuzhiyun	status = "okay";
163*4882a593Smuzhiyun};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun&reg_aldo2 {
166*4882a593Smuzhiyun	regulator-always-on;
167*4882a593Smuzhiyun	regulator-min-microvolt = <1800000>;
168*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
169*4882a593Smuzhiyun	regulator-name = "vcc-pl";
170*4882a593Smuzhiyun};
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun&reg_aldo3 {
173*4882a593Smuzhiyun	regulator-always-on;
174*4882a593Smuzhiyun	regulator-min-microvolt = <3000000>;
175*4882a593Smuzhiyun	regulator-max-microvolt = <3000000>;
176*4882a593Smuzhiyun	regulator-name = "vcc-pll-avcc";
177*4882a593Smuzhiyun};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun&reg_dcdc1 {
180*4882a593Smuzhiyun	regulator-always-on;
181*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
182*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
183*4882a593Smuzhiyun	regulator-name = "vcc-3v3";
184*4882a593Smuzhiyun};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun&reg_dcdc2 {
187*4882a593Smuzhiyun	regulator-always-on;
188*4882a593Smuzhiyun	regulator-min-microvolt = <1040000>;
189*4882a593Smuzhiyun	regulator-max-microvolt = <1300000>;
190*4882a593Smuzhiyun	regulator-name = "vdd-cpux";
191*4882a593Smuzhiyun};
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun/* DCDC3 is polyphased with DCDC2 */
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun&reg_dcdc5 {
196*4882a593Smuzhiyun	regulator-always-on;
197*4882a593Smuzhiyun	regulator-min-microvolt = <1500000>;
198*4882a593Smuzhiyun	regulator-max-microvolt = <1500000>;
199*4882a593Smuzhiyun	regulator-name = "vcc-dram";
200*4882a593Smuzhiyun};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun&reg_dcdc6 {
203*4882a593Smuzhiyun	regulator-always-on;
204*4882a593Smuzhiyun	regulator-min-microvolt = <1100000>;
205*4882a593Smuzhiyun	regulator-max-microvolt = <1100000>;
206*4882a593Smuzhiyun	regulator-name = "vdd-sys";
207*4882a593Smuzhiyun};
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun&reg_dldo1 {
210*4882a593Smuzhiyun	regulator-always-on;
211*4882a593Smuzhiyun	regulator-min-microvolt = <3300000>;
212*4882a593Smuzhiyun	regulator-max-microvolt = <3300000>;
213*4882a593Smuzhiyun	regulator-name = "vcc-hdmi-dsi";
214*4882a593Smuzhiyun};
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun&reg_dldo4 {
217*4882a593Smuzhiyun	regulator-always-on;
218*4882a593Smuzhiyun	regulator-min-microvolt = <3000000>;
219*4882a593Smuzhiyun	regulator-max-microvolt = <3000000>;
220*4882a593Smuzhiyun	regulator-name = "vcc-pg-wifi-io";
221*4882a593Smuzhiyun};
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun&reg_eldo1 {
224*4882a593Smuzhiyun	regulator-min-microvolt = <1800000>;
225*4882a593Smuzhiyun	regulator-max-microvolt = <1800000>;
226*4882a593Smuzhiyun	regulator-name = "cpvdd";
227*4882a593Smuzhiyun};
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun&reg_fldo1 {
230*4882a593Smuzhiyun	regulator-min-microvolt = <1200000>;
231*4882a593Smuzhiyun	regulator-max-microvolt = <1200000>;
232*4882a593Smuzhiyun	regulator-name = "vcc-1v2-hsic";
233*4882a593Smuzhiyun};
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun/*
236*4882a593Smuzhiyun * The A64 chip cannot work without this regulator off, although
237*4882a593Smuzhiyun * it seems to be only driving the AR100 core.
238*4882a593Smuzhiyun * Maybe we don't still know well about CPUs domain.
239*4882a593Smuzhiyun */
240*4882a593Smuzhiyun&reg_fldo2 {
241*4882a593Smuzhiyun	regulator-always-on;
242*4882a593Smuzhiyun	regulator-min-microvolt = <1100000>;
243*4882a593Smuzhiyun	regulator-max-microvolt = <1100000>;
244*4882a593Smuzhiyun	regulator-name = "vdd-cpus";
245*4882a593Smuzhiyun};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun&reg_rtc_ldo {
248*4882a593Smuzhiyun	regulator-name = "vcc-rtc";
249*4882a593Smuzhiyun};
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun&simplefb_hdmi {
252*4882a593Smuzhiyun	vcc-hdmi-supply = <&reg_dldo1>;
253*4882a593Smuzhiyun};
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun&uart0 {
256*4882a593Smuzhiyun	pinctrl-names = "default";
257*4882a593Smuzhiyun	pinctrl-0 = <&uart0_pb_pins>;
258*4882a593Smuzhiyun	status = "okay";
259*4882a593Smuzhiyun};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun&usbphy {
262*4882a593Smuzhiyun	status = "okay";
263*4882a593Smuzhiyun};
264