1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * arch/arm/plat-orion/include/plat/mpp.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Marvell Orion SoC MPP handling. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public 7*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any 8*4882a593Smuzhiyun * warranty of any kind, whether express or implied. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __PLAT_MPP_H 12*4882a593Smuzhiyun #define __PLAT_MPP_H 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define MPP_NUM(x) ((x) & 0xff) 15*4882a593Smuzhiyun #define MPP_SEL(x) (((x) >> 8) & 0xf) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* This is the generic MPP macro, without any variant information. 18*4882a593Smuzhiyun Each machine architecture is expected to extend this with further 19*4882a593Smuzhiyun bit fields indicating which MPP configurations are valid for a 20*4882a593Smuzhiyun specific variant. */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define GENERIC_MPP(_num, _sel, _in, _out) ( \ 23*4882a593Smuzhiyun /* MPP number */ ((_num) & 0xff) | \ 24*4882a593Smuzhiyun /* MPP select value */ (((_sel) & 0xf) << 8) | \ 25*4882a593Smuzhiyun /* may be input signal */ ((!!(_in)) << 12) | \ 26*4882a593Smuzhiyun /* may be output signal */ ((!!(_out)) << 13)) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define MPP_INPUT_MASK GENERIC_MPP(0, 0x0, 1, 0) 29*4882a593Smuzhiyun #define MPP_OUTPUT_MASK GENERIC_MPP(0, 0x0, 0, 1) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask, 32*4882a593Smuzhiyun unsigned int mpp_max, void __iomem *dev_bus); 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #endif 35