1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * linux/arch/arm/mm/tlb-v6.S 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1997-2002 Russell King 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * ARM architecture version 6 TLB handling functions. 8*4882a593Smuzhiyun * These assume a split I/D TLB. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun#include <linux/init.h> 11*4882a593Smuzhiyun#include <linux/linkage.h> 12*4882a593Smuzhiyun#include <asm/asm-offsets.h> 13*4882a593Smuzhiyun#include <asm/assembler.h> 14*4882a593Smuzhiyun#include <asm/page.h> 15*4882a593Smuzhiyun#include <asm/tlbflush.h> 16*4882a593Smuzhiyun#include "proc-macros.S" 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun#define HARVARD_TLB 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun/* 21*4882a593Smuzhiyun * v6wbi_flush_user_tlb_range(start, end, vma) 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * Invalidate a range of TLB entries in the specified address space. 24*4882a593Smuzhiyun * 25*4882a593Smuzhiyun * - start - start address (may not be aligned) 26*4882a593Smuzhiyun * - end - end address (exclusive, may not be aligned) 27*4882a593Smuzhiyun * - vma - vma_struct describing address range 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * It is assumed that: 30*4882a593Smuzhiyun * - the "Invalidate single entry" instruction will invalidate 31*4882a593Smuzhiyun * both the I and the D TLBs on Harvard-style TLBs 32*4882a593Smuzhiyun */ 33*4882a593SmuzhiyunENTRY(v6wbi_flush_user_tlb_range) 34*4882a593Smuzhiyun vma_vm_mm r3, r2 @ get vma->vm_mm 35*4882a593Smuzhiyun mov ip, #0 36*4882a593Smuzhiyun mmid r3, r3 @ get vm_mm->context.id 37*4882a593Smuzhiyun mcr p15, 0, ip, c7, c10, 4 @ drain write buffer 38*4882a593Smuzhiyun mov r0, r0, lsr #PAGE_SHIFT @ align address 39*4882a593Smuzhiyun mov r1, r1, lsr #PAGE_SHIFT 40*4882a593Smuzhiyun asid r3, r3 @ mask ASID 41*4882a593Smuzhiyun orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA 42*4882a593Smuzhiyun mov r1, r1, lsl #PAGE_SHIFT 43*4882a593Smuzhiyun vma_vm_flags r2, r2 @ get vma->vm_flags 44*4882a593Smuzhiyun1: 45*4882a593Smuzhiyun#ifdef HARVARD_TLB 46*4882a593Smuzhiyun mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA (was 1) 47*4882a593Smuzhiyun tst r2, #VM_EXEC @ Executable area ? 48*4882a593Smuzhiyun mcrne p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA (was 1) 49*4882a593Smuzhiyun#else 50*4882a593Smuzhiyun mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate MVA (was 1) 51*4882a593Smuzhiyun#endif 52*4882a593Smuzhiyun add r0, r0, #PAGE_SZ 53*4882a593Smuzhiyun cmp r0, r1 54*4882a593Smuzhiyun blo 1b 55*4882a593Smuzhiyun mcr p15, 0, ip, c7, c10, 4 @ data synchronization barrier 56*4882a593Smuzhiyun ret lr 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun/* 59*4882a593Smuzhiyun * v6wbi_flush_kern_tlb_range(start,end) 60*4882a593Smuzhiyun * 61*4882a593Smuzhiyun * Invalidate a range of kernel TLB entries 62*4882a593Smuzhiyun * 63*4882a593Smuzhiyun * - start - start address (may not be aligned) 64*4882a593Smuzhiyun * - end - end address (exclusive, may not be aligned) 65*4882a593Smuzhiyun */ 66*4882a593SmuzhiyunENTRY(v6wbi_flush_kern_tlb_range) 67*4882a593Smuzhiyun mov r2, #0 68*4882a593Smuzhiyun mcr p15, 0, r2, c7, c10, 4 @ drain write buffer 69*4882a593Smuzhiyun mov r0, r0, lsr #PAGE_SHIFT @ align address 70*4882a593Smuzhiyun mov r1, r1, lsr #PAGE_SHIFT 71*4882a593Smuzhiyun mov r0, r0, lsl #PAGE_SHIFT 72*4882a593Smuzhiyun mov r1, r1, lsl #PAGE_SHIFT 73*4882a593Smuzhiyun1: 74*4882a593Smuzhiyun#ifdef HARVARD_TLB 75*4882a593Smuzhiyun mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA 76*4882a593Smuzhiyun mcr p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA 77*4882a593Smuzhiyun#else 78*4882a593Smuzhiyun mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate MVA 79*4882a593Smuzhiyun#endif 80*4882a593Smuzhiyun add r0, r0, #PAGE_SZ 81*4882a593Smuzhiyun cmp r0, r1 82*4882a593Smuzhiyun blo 1b 83*4882a593Smuzhiyun mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier 84*4882a593Smuzhiyun mcr p15, 0, r2, c7, c5, 4 @ prefetch flush (isb) 85*4882a593Smuzhiyun ret lr 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun __INIT 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */ 90*4882a593Smuzhiyun define_tlb_functions v6wbi, v6wbi_tlb_flags 91