xref: /OK3568_Linux_fs/kernel/arch/arm/mach-tegra/irq.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2011 Google, Inc.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author:
6*4882a593Smuzhiyun  *	Colin Cross <ccross@android.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Copyright (C) 2010,2013, NVIDIA Corporation
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/cpu_pm.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/io.h>
14*4882a593Smuzhiyun #include <linux/irqchip/arm-gic.h>
15*4882a593Smuzhiyun #include <linux/irq.h>
16*4882a593Smuzhiyun #include <linux/kernel.h>
17*4882a593Smuzhiyun #include <linux/of_address.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/syscore_ops.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <soc/tegra/irq.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "board.h"
24*4882a593Smuzhiyun #include "iomap.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define SGI_MASK 0xFFFF
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
29*4882a593Smuzhiyun static void __iomem *tegra_gic_cpu_base;
30*4882a593Smuzhiyun #endif
31*4882a593Smuzhiyun 
tegra_pending_sgi(void)32*4882a593Smuzhiyun bool tegra_pending_sgi(void)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	u32 pending_set;
35*4882a593Smuzhiyun 	void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET);
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	if (pending_set & SGI_MASK)
40*4882a593Smuzhiyun 		return true;
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	return false;
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
tegra_gic_notifier(struct notifier_block * self,unsigned long cmd,void * v)46*4882a593Smuzhiyun static int tegra_gic_notifier(struct notifier_block *self,
47*4882a593Smuzhiyun 			      unsigned long cmd, void *v)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	switch (cmd) {
50*4882a593Smuzhiyun 	case CPU_PM_ENTER:
51*4882a593Smuzhiyun 		writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL);
52*4882a593Smuzhiyun 		break;
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	return NOTIFY_OK;
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun static struct notifier_block tegra_gic_notifier_block = {
59*4882a593Smuzhiyun 	.notifier_call = tegra_gic_notifier,
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun static const struct of_device_id tegra114_dt_gic_match[] __initconst = {
63*4882a593Smuzhiyun 	{ .compatible = "arm,cortex-a15-gic" },
64*4882a593Smuzhiyun 	{ }
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
tegra114_gic_cpu_pm_registration(void)67*4882a593Smuzhiyun static void __init tegra114_gic_cpu_pm_registration(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct device_node *dn;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	dn = of_find_matching_node(NULL, tegra114_dt_gic_match);
72*4882a593Smuzhiyun 	if (!dn)
73*4882a593Smuzhiyun 		return;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	tegra_gic_cpu_base = of_iomap(dn, 1);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	cpu_pm_register_notifier(&tegra_gic_notifier_block);
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun #else
tegra114_gic_cpu_pm_registration(void)80*4882a593Smuzhiyun static void __init tegra114_gic_cpu_pm_registration(void) { }
81*4882a593Smuzhiyun #endif
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static const struct of_device_id tegra_ictlr_match[] __initconst = {
84*4882a593Smuzhiyun 	{ .compatible = "nvidia,tegra20-ictlr" },
85*4882a593Smuzhiyun 	{ .compatible = "nvidia,tegra30-ictlr" },
86*4882a593Smuzhiyun 	{ }
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
tegra_init_irq(void)89*4882a593Smuzhiyun void __init tegra_init_irq(void)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun 	if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match)))
92*4882a593Smuzhiyun 		pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	tegra114_gic_cpu_pm_registration();
95*4882a593Smuzhiyun }
96