1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * arch/arm/mach-spear3xx/spear300.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPEAr300 machine source file
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2009-2012 ST Microelectronics
7*4882a593Smuzhiyun * Viresh Kumar <vireshk@kernel.org>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
10*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
11*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define pr_fmt(fmt) "SPEAr300: " fmt
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <linux/amba/pl08x.h>
17*4882a593Smuzhiyun #include <linux/of_platform.h>
18*4882a593Smuzhiyun #include <asm/mach/arch.h>
19*4882a593Smuzhiyun #include "generic.h"
20*4882a593Smuzhiyun #include <mach/spear.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* DMAC platform data's slave info */
23*4882a593Smuzhiyun struct pl08x_channel_data spear300_dma_info[] = {
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun .bus_id = "uart0_rx",
26*4882a593Smuzhiyun .min_signal = 2,
27*4882a593Smuzhiyun .max_signal = 2,
28*4882a593Smuzhiyun .muxval = 0,
29*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
30*4882a593Smuzhiyun }, {
31*4882a593Smuzhiyun .bus_id = "uart0_tx",
32*4882a593Smuzhiyun .min_signal = 3,
33*4882a593Smuzhiyun .max_signal = 3,
34*4882a593Smuzhiyun .muxval = 0,
35*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
36*4882a593Smuzhiyun }, {
37*4882a593Smuzhiyun .bus_id = "ssp0_rx",
38*4882a593Smuzhiyun .min_signal = 8,
39*4882a593Smuzhiyun .max_signal = 8,
40*4882a593Smuzhiyun .muxval = 0,
41*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
42*4882a593Smuzhiyun }, {
43*4882a593Smuzhiyun .bus_id = "ssp0_tx",
44*4882a593Smuzhiyun .min_signal = 9,
45*4882a593Smuzhiyun .max_signal = 9,
46*4882a593Smuzhiyun .muxval = 0,
47*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
48*4882a593Smuzhiyun }, {
49*4882a593Smuzhiyun .bus_id = "i2c_rx",
50*4882a593Smuzhiyun .min_signal = 10,
51*4882a593Smuzhiyun .max_signal = 10,
52*4882a593Smuzhiyun .muxval = 0,
53*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
54*4882a593Smuzhiyun }, {
55*4882a593Smuzhiyun .bus_id = "i2c_tx",
56*4882a593Smuzhiyun .min_signal = 11,
57*4882a593Smuzhiyun .max_signal = 11,
58*4882a593Smuzhiyun .muxval = 0,
59*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
60*4882a593Smuzhiyun }, {
61*4882a593Smuzhiyun .bus_id = "irda",
62*4882a593Smuzhiyun .min_signal = 12,
63*4882a593Smuzhiyun .max_signal = 12,
64*4882a593Smuzhiyun .muxval = 0,
65*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
66*4882a593Smuzhiyun }, {
67*4882a593Smuzhiyun .bus_id = "adc",
68*4882a593Smuzhiyun .min_signal = 13,
69*4882a593Smuzhiyun .max_signal = 13,
70*4882a593Smuzhiyun .muxval = 0,
71*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
72*4882a593Smuzhiyun }, {
73*4882a593Smuzhiyun .bus_id = "to_jpeg",
74*4882a593Smuzhiyun .min_signal = 14,
75*4882a593Smuzhiyun .max_signal = 14,
76*4882a593Smuzhiyun .muxval = 0,
77*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
78*4882a593Smuzhiyun }, {
79*4882a593Smuzhiyun .bus_id = "from_jpeg",
80*4882a593Smuzhiyun .min_signal = 15,
81*4882a593Smuzhiyun .max_signal = 15,
82*4882a593Smuzhiyun .muxval = 0,
83*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
84*4882a593Smuzhiyun }, {
85*4882a593Smuzhiyun .bus_id = "ras0_rx",
86*4882a593Smuzhiyun .min_signal = 0,
87*4882a593Smuzhiyun .max_signal = 0,
88*4882a593Smuzhiyun .muxval = 1,
89*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
90*4882a593Smuzhiyun }, {
91*4882a593Smuzhiyun .bus_id = "ras0_tx",
92*4882a593Smuzhiyun .min_signal = 1,
93*4882a593Smuzhiyun .max_signal = 1,
94*4882a593Smuzhiyun .muxval = 1,
95*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
96*4882a593Smuzhiyun }, {
97*4882a593Smuzhiyun .bus_id = "ras1_rx",
98*4882a593Smuzhiyun .min_signal = 2,
99*4882a593Smuzhiyun .max_signal = 2,
100*4882a593Smuzhiyun .muxval = 1,
101*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
102*4882a593Smuzhiyun }, {
103*4882a593Smuzhiyun .bus_id = "ras1_tx",
104*4882a593Smuzhiyun .min_signal = 3,
105*4882a593Smuzhiyun .max_signal = 3,
106*4882a593Smuzhiyun .muxval = 1,
107*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
108*4882a593Smuzhiyun }, {
109*4882a593Smuzhiyun .bus_id = "ras2_rx",
110*4882a593Smuzhiyun .min_signal = 4,
111*4882a593Smuzhiyun .max_signal = 4,
112*4882a593Smuzhiyun .muxval = 1,
113*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
114*4882a593Smuzhiyun }, {
115*4882a593Smuzhiyun .bus_id = "ras2_tx",
116*4882a593Smuzhiyun .min_signal = 5,
117*4882a593Smuzhiyun .max_signal = 5,
118*4882a593Smuzhiyun .muxval = 1,
119*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
120*4882a593Smuzhiyun }, {
121*4882a593Smuzhiyun .bus_id = "ras3_rx",
122*4882a593Smuzhiyun .min_signal = 6,
123*4882a593Smuzhiyun .max_signal = 6,
124*4882a593Smuzhiyun .muxval = 1,
125*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
126*4882a593Smuzhiyun }, {
127*4882a593Smuzhiyun .bus_id = "ras3_tx",
128*4882a593Smuzhiyun .min_signal = 7,
129*4882a593Smuzhiyun .max_signal = 7,
130*4882a593Smuzhiyun .muxval = 1,
131*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
132*4882a593Smuzhiyun }, {
133*4882a593Smuzhiyun .bus_id = "ras4_rx",
134*4882a593Smuzhiyun .min_signal = 8,
135*4882a593Smuzhiyun .max_signal = 8,
136*4882a593Smuzhiyun .muxval = 1,
137*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
138*4882a593Smuzhiyun }, {
139*4882a593Smuzhiyun .bus_id = "ras4_tx",
140*4882a593Smuzhiyun .min_signal = 9,
141*4882a593Smuzhiyun .max_signal = 9,
142*4882a593Smuzhiyun .muxval = 1,
143*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
144*4882a593Smuzhiyun }, {
145*4882a593Smuzhiyun .bus_id = "ras5_rx",
146*4882a593Smuzhiyun .min_signal = 10,
147*4882a593Smuzhiyun .max_signal = 10,
148*4882a593Smuzhiyun .muxval = 1,
149*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
150*4882a593Smuzhiyun }, {
151*4882a593Smuzhiyun .bus_id = "ras5_tx",
152*4882a593Smuzhiyun .min_signal = 11,
153*4882a593Smuzhiyun .max_signal = 11,
154*4882a593Smuzhiyun .muxval = 1,
155*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
156*4882a593Smuzhiyun }, {
157*4882a593Smuzhiyun .bus_id = "ras6_rx",
158*4882a593Smuzhiyun .min_signal = 12,
159*4882a593Smuzhiyun .max_signal = 12,
160*4882a593Smuzhiyun .muxval = 1,
161*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
162*4882a593Smuzhiyun }, {
163*4882a593Smuzhiyun .bus_id = "ras6_tx",
164*4882a593Smuzhiyun .min_signal = 13,
165*4882a593Smuzhiyun .max_signal = 13,
166*4882a593Smuzhiyun .muxval = 1,
167*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
168*4882a593Smuzhiyun }, {
169*4882a593Smuzhiyun .bus_id = "ras7_rx",
170*4882a593Smuzhiyun .min_signal = 14,
171*4882a593Smuzhiyun .max_signal = 14,
172*4882a593Smuzhiyun .muxval = 1,
173*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
174*4882a593Smuzhiyun }, {
175*4882a593Smuzhiyun .bus_id = "ras7_tx",
176*4882a593Smuzhiyun .min_signal = 15,
177*4882a593Smuzhiyun .max_signal = 15,
178*4882a593Smuzhiyun .muxval = 1,
179*4882a593Smuzhiyun .periph_buses = PL08X_AHB1,
180*4882a593Smuzhiyun },
181*4882a593Smuzhiyun };
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* Add SPEAr300 auxdata to pass platform data */
184*4882a593Smuzhiyun static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = {
185*4882a593Smuzhiyun OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
186*4882a593Smuzhiyun &pl022_plat_data),
187*4882a593Smuzhiyun OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
188*4882a593Smuzhiyun &pl080_plat_data),
189*4882a593Smuzhiyun {}
190*4882a593Smuzhiyun };
191*4882a593Smuzhiyun
spear300_dt_init(void)192*4882a593Smuzhiyun static void __init spear300_dt_init(void)
193*4882a593Smuzhiyun {
194*4882a593Smuzhiyun pl080_plat_data.slave_channels = spear300_dma_info;
195*4882a593Smuzhiyun pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info);
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun of_platform_default_populate(NULL, spear300_auxdata_lookup, NULL);
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun static const char * const spear300_dt_board_compat[] = {
201*4882a593Smuzhiyun "st,spear300",
202*4882a593Smuzhiyun "st,spear300-evb",
203*4882a593Smuzhiyun NULL,
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun
spear300_map_io(void)206*4882a593Smuzhiyun static void __init spear300_map_io(void)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun spear3xx_map_io();
209*4882a593Smuzhiyun }
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
212*4882a593Smuzhiyun .map_io = spear300_map_io,
213*4882a593Smuzhiyun .init_time = spear3xx_timer_init,
214*4882a593Smuzhiyun .init_machine = spear300_dt_init,
215*4882a593Smuzhiyun .restart = spear_restart,
216*4882a593Smuzhiyun .dt_compat = spear300_dt_board_compat,
217*4882a593Smuzhiyun MACHINE_END
218