1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * arch/arm/mach-spear13xx/spear1310.c
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPEAr1310 machine source file
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2012 ST Microelectronics
7*4882a593Smuzhiyun * Viresh Kumar <vireshk@kernel.org>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is licensed under the terms of the GNU General Public
10*4882a593Smuzhiyun * License version 2. This program is licensed "as is" without any
11*4882a593Smuzhiyun * warranty of any kind, whether express or implied.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define pr_fmt(fmt) "SPEAr1310: " fmt
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <linux/amba/pl022.h>
17*4882a593Smuzhiyun #include <linux/pata_arasan_cf_data.h>
18*4882a593Smuzhiyun #include <asm/mach/arch.h>
19*4882a593Smuzhiyun #include <asm/mach/map.h>
20*4882a593Smuzhiyun #include "generic.h"
21*4882a593Smuzhiyun #include <mach/spear.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* Base addresses */
24*4882a593Smuzhiyun #define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000)
25*4882a593Smuzhiyun #define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000)
26*4882a593Smuzhiyun
spear1310_dt_init(void)27*4882a593Smuzhiyun static void __init spear1310_dt_init(void)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun platform_device_register_simple("spear-cpufreq", -1, NULL, 0);
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun static const char * const spear1310_dt_board_compat[] = {
33*4882a593Smuzhiyun "st,spear1310",
34*4882a593Smuzhiyun "st,spear1310-evb",
35*4882a593Smuzhiyun NULL,
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun * Following will create 16MB static virtual/physical mappings
40*4882a593Smuzhiyun * PHYSICAL VIRTUAL
41*4882a593Smuzhiyun * 0xD8000000 0xFA000000
42*4882a593Smuzhiyun */
43*4882a593Smuzhiyun static struct map_desc spear1310_io_desc[] __initdata = {
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun .virtual = VA_SPEAR1310_RAS_GRP1_BASE,
46*4882a593Smuzhiyun .pfn = __phys_to_pfn(SPEAR1310_RAS_GRP1_BASE),
47*4882a593Smuzhiyun .length = SZ_16M,
48*4882a593Smuzhiyun .type = MT_DEVICE
49*4882a593Smuzhiyun },
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
spear1310_map_io(void)52*4882a593Smuzhiyun static void __init spear1310_map_io(void)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun iotable_init(spear1310_io_desc, ARRAY_SIZE(spear1310_io_desc));
55*4882a593Smuzhiyun spear13xx_map_io();
56*4882a593Smuzhiyun }
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree")
59*4882a593Smuzhiyun .smp = smp_ops(spear13xx_smp_ops),
60*4882a593Smuzhiyun .map_io = spear1310_map_io,
61*4882a593Smuzhiyun .init_time = spear13xx_timer_init,
62*4882a593Smuzhiyun .init_machine = spear1310_dt_init,
63*4882a593Smuzhiyun .restart = spear_restart,
64*4882a593Smuzhiyun .dt_compat = spear1310_dt_board_compat,
65*4882a593Smuzhiyun MACHINE_END
66