1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-spear13xx/hotplug.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2012 ST Microelectronics Ltd.
6*4882a593Smuzhiyun * Deepak Sikri <deepak.sikri@st.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * based upon linux/arch/arm/mach-realview/hotplug.c
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/errno.h>
12*4882a593Smuzhiyun #include <linux/smp.h>
13*4882a593Smuzhiyun #include <asm/cp15.h>
14*4882a593Smuzhiyun #include <asm/smp_plat.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include "generic.h"
17*4882a593Smuzhiyun
cpu_enter_lowpower(void)18*4882a593Smuzhiyun static inline void cpu_enter_lowpower(void)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun unsigned int v;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun asm volatile(
23*4882a593Smuzhiyun " mcr p15, 0, %1, c7, c5, 0\n"
24*4882a593Smuzhiyun " dsb\n"
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * Turn off coherency
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun " mrc p15, 0, %0, c1, c0, 1\n"
29*4882a593Smuzhiyun " bic %0, %0, #0x20\n"
30*4882a593Smuzhiyun " mcr p15, 0, %0, c1, c0, 1\n"
31*4882a593Smuzhiyun " mrc p15, 0, %0, c1, c0, 0\n"
32*4882a593Smuzhiyun " bic %0, %0, %2\n"
33*4882a593Smuzhiyun " mcr p15, 0, %0, c1, c0, 0\n"
34*4882a593Smuzhiyun : "=&r" (v)
35*4882a593Smuzhiyun : "r" (0), "Ir" (CR_C)
36*4882a593Smuzhiyun : "cc", "memory");
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun
cpu_leave_lowpower(void)39*4882a593Smuzhiyun static inline void cpu_leave_lowpower(void)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun unsigned int v;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c1, c0, 0\n"
44*4882a593Smuzhiyun " orr %0, %0, %1\n"
45*4882a593Smuzhiyun " mcr p15, 0, %0, c1, c0, 0\n"
46*4882a593Smuzhiyun " mrc p15, 0, %0, c1, c0, 1\n"
47*4882a593Smuzhiyun " orr %0, %0, #0x20\n"
48*4882a593Smuzhiyun " mcr p15, 0, %0, c1, c0, 1\n"
49*4882a593Smuzhiyun : "=&r" (v)
50*4882a593Smuzhiyun : "Ir" (CR_C)
51*4882a593Smuzhiyun : "cc");
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
spear13xx_do_lowpower(unsigned int cpu,int * spurious)54*4882a593Smuzhiyun static inline void spear13xx_do_lowpower(unsigned int cpu, int *spurious)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun for (;;) {
57*4882a593Smuzhiyun wfi();
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun if (spear_pen_release == cpu) {
60*4882a593Smuzhiyun /*
61*4882a593Smuzhiyun * OK, proper wakeup, we're done
62*4882a593Smuzhiyun */
63*4882a593Smuzhiyun break;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun /*
67*4882a593Smuzhiyun * Getting here, means that we have come out of WFI without
68*4882a593Smuzhiyun * having been woken up - this shouldn't happen
69*4882a593Smuzhiyun *
70*4882a593Smuzhiyun * Just note it happening - when we're woken, we can report
71*4882a593Smuzhiyun * its occurrence.
72*4882a593Smuzhiyun */
73*4882a593Smuzhiyun (*spurious)++;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun * platform-specific code to shutdown a CPU
79*4882a593Smuzhiyun *
80*4882a593Smuzhiyun * Called with IRQs disabled
81*4882a593Smuzhiyun */
spear13xx_cpu_die(unsigned int cpu)82*4882a593Smuzhiyun void spear13xx_cpu_die(unsigned int cpu)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun int spurious = 0;
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /*
87*4882a593Smuzhiyun * we're ready for shutdown now, so do it
88*4882a593Smuzhiyun */
89*4882a593Smuzhiyun cpu_enter_lowpower();
90*4882a593Smuzhiyun spear13xx_do_lowpower(cpu, &spurious);
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun /*
93*4882a593Smuzhiyun * bring this CPU back into the world of cache
94*4882a593Smuzhiyun * coherency, and then restore interrupts
95*4882a593Smuzhiyun */
96*4882a593Smuzhiyun cpu_leave_lowpower();
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun if (spurious)
99*4882a593Smuzhiyun pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
100*4882a593Smuzhiyun }
101