1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * r8a7778 processor support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Renesas Solutions Corp.
6*4882a593Smuzhiyun * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
7*4882a593Smuzhiyun * Copyright (C) 2013 Cogent Embedded, Inc.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/irqchip.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include <asm/mach/arch.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "common.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define INT2SMSKCR0 0x82288 /* 0xfe782288 */
18*4882a593Smuzhiyun #define INT2SMSKCR1 0x8228c /* 0xfe78228c */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define INT2NTSR0 0x00018 /* 0xfe700018 */
21*4882a593Smuzhiyun #define INT2NTSR1 0x0002c /* 0xfe70002c */
22*4882a593Smuzhiyun
r8a7778_init_irq_dt(void)23*4882a593Smuzhiyun static void __init r8a7778_init_irq_dt(void)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun void __iomem *base = ioremap(0xfe700000, 0x00100000);
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun BUG_ON(!base);
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun irqchip_init();
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun /* route all interrupts to ARM */
32*4882a593Smuzhiyun __raw_writel(0x73ffffff, base + INT2NTSR0);
33*4882a593Smuzhiyun __raw_writel(0xffffffff, base + INT2NTSR1);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* unmask all known interrupts in INTCS2 */
36*4882a593Smuzhiyun __raw_writel(0x08330773, base + INT2SMSKCR0);
37*4882a593Smuzhiyun __raw_writel(0x00311110, base + INT2SMSKCR1);
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun iounmap(base);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun static const char *const r8a7778_compat_dt[] __initconst = {
43*4882a593Smuzhiyun "renesas,r8a7778",
44*4882a593Smuzhiyun NULL,
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)")
48*4882a593Smuzhiyun .init_early = shmobile_init_delay,
49*4882a593Smuzhiyun .init_irq = r8a7778_init_irq_dt,
50*4882a593Smuzhiyun .init_late = shmobile_init_late,
51*4882a593Smuzhiyun .dt_compat = r8a7778_compat_dt,
52*4882a593Smuzhiyun MACHINE_END
53