1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * SMP support for SoCs with SCU covered by mach-shmobile
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2013 Magnus Damm
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <linux/cpu.h>
8*4882a593Smuzhiyun #include <linux/delay.h>
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun #include <linux/smp.h>
12*4882a593Smuzhiyun #include <asm/cacheflush.h>
13*4882a593Smuzhiyun #include <asm/smp_plat.h>
14*4882a593Smuzhiyun #include <asm/smp_scu.h>
15*4882a593Smuzhiyun #include "common.h"
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static phys_addr_t shmobile_scu_base_phys;
19*4882a593Smuzhiyun static void __iomem *shmobile_scu_base;
20*4882a593Smuzhiyun
shmobile_scu_cpu_prepare(unsigned int cpu)21*4882a593Smuzhiyun static int shmobile_scu_cpu_prepare(unsigned int cpu)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun /* For this particular CPU register SCU SMP boot vector */
24*4882a593Smuzhiyun shmobile_smp_hook(cpu, __pa_symbol(shmobile_boot_scu),
25*4882a593Smuzhiyun shmobile_scu_base_phys);
26*4882a593Smuzhiyun return 0;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,unsigned int max_cpus)29*4882a593Smuzhiyun void __init shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,
30*4882a593Smuzhiyun unsigned int max_cpus)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun /* install boot code shared by all CPUs */
33*4882a593Smuzhiyun shmobile_boot_fn = __pa_symbol(shmobile_smp_boot);
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* enable SCU and cache coherency on booting CPU */
36*4882a593Smuzhiyun shmobile_scu_base_phys = scu_base_phys;
37*4882a593Smuzhiyun shmobile_scu_base = ioremap(scu_base_phys, PAGE_SIZE);
38*4882a593Smuzhiyun scu_enable(shmobile_scu_base);
39*4882a593Smuzhiyun scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /* Use CPU notifier for reset vector control */
42*4882a593Smuzhiyun cpuhp_setup_state_nocalls(CPUHP_ARM_SHMOBILE_SCU_PREPARE,
43*4882a593Smuzhiyun "arm/shmobile-scu:prepare",
44*4882a593Smuzhiyun shmobile_scu_cpu_prepare, NULL);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #ifdef CONFIG_HOTPLUG_CPU
shmobile_smp_scu_cpu_die(unsigned int cpu)48*4882a593Smuzhiyun void shmobile_smp_scu_cpu_die(unsigned int cpu)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun /* For this particular CPU deregister boot vector */
51*4882a593Smuzhiyun shmobile_smp_hook(cpu, 0, 0);
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun dsb();
54*4882a593Smuzhiyun flush_cache_all();
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun /* disable cache coherency */
57*4882a593Smuzhiyun scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun /* jump to shared mach-shmobile sleep / reset code */
60*4882a593Smuzhiyun shmobile_smp_sleep();
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
shmobile_smp_scu_psr_core_disabled(int cpu)63*4882a593Smuzhiyun static int shmobile_smp_scu_psr_core_disabled(int cpu)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun unsigned long mask = SCU_PM_POWEROFF << (cpu * 8);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
68*4882a593Smuzhiyun return 1;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return 0;
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
shmobile_smp_scu_cpu_kill(unsigned int cpu)73*4882a593Smuzhiyun int shmobile_smp_scu_cpu_kill(unsigned int cpu)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun int k;
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* this function is running on another CPU than the offline target,
78*4882a593Smuzhiyun * here we need wait for shutdown code in platform_cpu_die() to
79*4882a593Smuzhiyun * finish before asking SoC-specific code to power off the CPU core.
80*4882a593Smuzhiyun */
81*4882a593Smuzhiyun for (k = 0; k < 1000; k++) {
82*4882a593Smuzhiyun if (shmobile_smp_scu_psr_core_disabled(cpu))
83*4882a593Smuzhiyun return 1;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun mdelay(1);
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun return 0;
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun #endif
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