xref: /OK3568_Linux_fs/kernel/arch/arm/mach-sa1100/shannon.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * linux/arch/arm/mach-sa1100/shannon.c
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/init.h>
7*4882a593Smuzhiyun #include <linux/device.h>
8*4882a593Smuzhiyun #include <linux/gpio/machine.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/platform_data/sa11x0-serial.h>
11*4882a593Smuzhiyun #include <linux/tty.h>
12*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
13*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
14*4882a593Smuzhiyun #include <linux/regulator/fixed.h>
15*4882a593Smuzhiyun #include <linux/regulator/machine.h>
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <video/sa1100fb.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <mach/hardware.h>
20*4882a593Smuzhiyun #include <asm/mach-types.h>
21*4882a593Smuzhiyun #include <asm/setup.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <asm/mach/arch.h>
24*4882a593Smuzhiyun #include <asm/mach/flash.h>
25*4882a593Smuzhiyun #include <asm/mach/map.h>
26*4882a593Smuzhiyun #include <linux/platform_data/mfd-mcp-sa11x0.h>
27*4882a593Smuzhiyun #include <mach/shannon.h>
28*4882a593Smuzhiyun #include <mach/irqs.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include "generic.h"
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static struct mtd_partition shannon_partitions[] = {
33*4882a593Smuzhiyun 	{
34*4882a593Smuzhiyun 		.name		= "BLOB boot loader",
35*4882a593Smuzhiyun 		.offset		= 0,
36*4882a593Smuzhiyun 		.size		= 0x20000
37*4882a593Smuzhiyun 	},
38*4882a593Smuzhiyun 	{
39*4882a593Smuzhiyun 		.name		= "kernel",
40*4882a593Smuzhiyun 		.offset		= MTDPART_OFS_APPEND,
41*4882a593Smuzhiyun 		.size		= 0xe0000
42*4882a593Smuzhiyun 	},
43*4882a593Smuzhiyun 	{
44*4882a593Smuzhiyun 		.name		= "initrd",
45*4882a593Smuzhiyun 		.offset		= MTDPART_OFS_APPEND,
46*4882a593Smuzhiyun 		.size		= MTDPART_SIZ_FULL
47*4882a593Smuzhiyun 	}
48*4882a593Smuzhiyun };
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun static struct flash_platform_data shannon_flash_data = {
51*4882a593Smuzhiyun 	.map_name	= "cfi_probe",
52*4882a593Smuzhiyun 	.parts		= shannon_partitions,
53*4882a593Smuzhiyun 	.nr_parts	= ARRAY_SIZE(shannon_partitions),
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun static struct resource shannon_flash_resource =
57*4882a593Smuzhiyun 	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun static struct mcp_plat_data shannon_mcp_data = {
60*4882a593Smuzhiyun 	.mccr0		= MCCR0_ADM,
61*4882a593Smuzhiyun 	.sclk_rate	= 11981000,
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun static struct sa1100fb_mach_info shannon_lcd_info = {
65*4882a593Smuzhiyun 	.pixclock	= 152500,	.bpp		= 8,
66*4882a593Smuzhiyun 	.xres		= 640,		.yres		= 480,
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	.hsync_len	= 4,		.vsync_len	= 3,
69*4882a593Smuzhiyun 	.left_margin	= 2,		.upper_margin	= 0,
70*4882a593Smuzhiyun 	.right_margin	= 1,		.lower_margin	= 0,
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	.lccr0		= LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
75*4882a593Smuzhiyun 	.lccr3		= LCCR3_ACBsDiv(512),
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun static struct gpiod_lookup_table shannon_pcmcia0_gpio_table = {
79*4882a593Smuzhiyun 	.dev_id = "sa11x0-pcmcia.0",
80*4882a593Smuzhiyun 	.table = {
81*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 24, "detect", GPIO_ACTIVE_LOW),
82*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 26, "ready", GPIO_ACTIVE_HIGH),
83*4882a593Smuzhiyun 		{ },
84*4882a593Smuzhiyun 	},
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun static struct gpiod_lookup_table shannon_pcmcia1_gpio_table = {
88*4882a593Smuzhiyun 	.dev_id = "sa11x0-pcmcia.1",
89*4882a593Smuzhiyun 	.table = {
90*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 25, "detect", GPIO_ACTIVE_LOW),
91*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 27, "ready", GPIO_ACTIVE_HIGH),
92*4882a593Smuzhiyun 		{ },
93*4882a593Smuzhiyun 	},
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun static struct regulator_consumer_supply shannon_cf_vcc_consumers[] = {
97*4882a593Smuzhiyun 	REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.0"),
98*4882a593Smuzhiyun 	REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = {
102*4882a593Smuzhiyun 	.supply_name = "cf-power",
103*4882a593Smuzhiyun 	.microvolts = 3300000,
104*4882a593Smuzhiyun 	.enabled_at_boot = 1,
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun static struct gpiod_lookup_table shannon_display_gpio_table = {
108*4882a593Smuzhiyun 	.dev_id = "sa11x0-fb",
109*4882a593Smuzhiyun 	.table = {
110*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 22, "shannon-lcden", GPIO_ACTIVE_HIGH),
111*4882a593Smuzhiyun 		{ },
112*4882a593Smuzhiyun 	},
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun 
shannon_init(void)115*4882a593Smuzhiyun static void __init shannon_init(void)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata,
118*4882a593Smuzhiyun 					shannon_cf_vcc_consumers,
119*4882a593Smuzhiyun 					ARRAY_SIZE(shannon_cf_vcc_consumers),
120*4882a593Smuzhiyun 					false);
121*4882a593Smuzhiyun 	sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table);
122*4882a593Smuzhiyun 	sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table);
123*4882a593Smuzhiyun 	sa11x0_ppc_configure_mcp();
124*4882a593Smuzhiyun 	gpiod_add_lookup_table(&shannon_display_gpio_table);
125*4882a593Smuzhiyun 	sa11x0_register_lcd(&shannon_lcd_info);
126*4882a593Smuzhiyun 	sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
127*4882a593Smuzhiyun 	sa11x0_register_mcp(&shannon_mcp_data);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
shannon_map_io(void)130*4882a593Smuzhiyun static void __init shannon_map_io(void)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	sa1100_map_io();
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	sa1100_register_uart(0, 3);
135*4882a593Smuzhiyun 	sa1100_register_uart(1, 1);
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	Ser1SDCR0 |= SDCR0_SUS;
138*4882a593Smuzhiyun 	GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
139*4882a593Smuzhiyun 	GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
140*4882a593Smuzhiyun 	GPDR &= ~GPIO_UART_RXD;
141*4882a593Smuzhiyun 	PPAR |= PPAR_UPR;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	/* reset the codec */
144*4882a593Smuzhiyun 	GPCR = SHANNON_GPIO_CODEC_RESET;
145*4882a593Smuzhiyun 	GPSR = SHANNON_GPIO_CODEC_RESET;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
149*4882a593Smuzhiyun 	.atag_offset	= 0x100,
150*4882a593Smuzhiyun 	.map_io		= shannon_map_io,
151*4882a593Smuzhiyun 	.nr_irqs	= SA1100_NR_IRQS,
152*4882a593Smuzhiyun 	.init_irq	= sa1100_init_irq,
153*4882a593Smuzhiyun 	.init_time	= sa1100_timer_init,
154*4882a593Smuzhiyun 	.init_machine	= shannon_init,
155*4882a593Smuzhiyun 	.init_late	= sa11x0_init_late,
156*4882a593Smuzhiyun 	.restart	= sa11x0_restart,
157*4882a593Smuzhiyun MACHINE_END
158