xref: /OK3568_Linux_fs/kernel/arch/arm/mach-sa1100/lart.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * linux/arch/arm/mach-sa1100/lart.c
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include <linux/init.h>
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/platform_data/sa11x0-serial.h>
9*4882a593Smuzhiyun #include <linux/tty.h>
10*4882a593Smuzhiyun #include <linux/gpio.h>
11*4882a593Smuzhiyun #include <linux/leds.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <video/sa1100fb.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <mach/hardware.h>
17*4882a593Smuzhiyun #include <asm/setup.h>
18*4882a593Smuzhiyun #include <asm/mach-types.h>
19*4882a593Smuzhiyun #include <asm/page.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <asm/mach/arch.h>
22*4882a593Smuzhiyun #include <asm/mach/map.h>
23*4882a593Smuzhiyun #include <linux/platform_data/mfd-mcp-sa11x0.h>
24*4882a593Smuzhiyun #include <mach/irqs.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include "generic.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun static struct mcp_plat_data lart_mcp_data = {
29*4882a593Smuzhiyun 	.mccr0		= MCCR0_ADM,
30*4882a593Smuzhiyun 	.sclk_rate	= 11981000,
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #ifdef LART_GREY_LCD
34*4882a593Smuzhiyun static struct sa1100fb_mach_info lart_grey_info = {
35*4882a593Smuzhiyun 	.pixclock	= 150000,	.bpp		= 4,
36*4882a593Smuzhiyun 	.xres		= 320,		.yres		= 240,
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	.hsync_len	= 1,		.vsync_len	= 1,
39*4882a593Smuzhiyun 	.left_margin	= 4,		.upper_margin	= 0,
40*4882a593Smuzhiyun 	.right_margin	= 2,		.lower_margin	= 0,
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	.cmap_greyscale	= 1,
43*4882a593Smuzhiyun 	.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	.lccr0		= LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono,
46*4882a593Smuzhiyun 	.lccr3		= LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
47*4882a593Smuzhiyun };
48*4882a593Smuzhiyun #endif
49*4882a593Smuzhiyun #ifdef LART_COLOR_LCD
50*4882a593Smuzhiyun static struct sa1100fb_mach_info lart_color_info = {
51*4882a593Smuzhiyun 	.pixclock	= 150000,	.bpp		= 16,
52*4882a593Smuzhiyun 	.xres		= 320,		.yres		= 240,
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	.hsync_len	= 2,		.vsync_len	= 3,
55*4882a593Smuzhiyun 	.left_margin	= 69,		.upper_margin	= 14,
56*4882a593Smuzhiyun 	.right_margin	= 8,		.lower_margin	= 4,
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
59*4882a593Smuzhiyun 	.lccr3		= LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun #endif
62*4882a593Smuzhiyun #ifdef LART_VIDEO_OUT
63*4882a593Smuzhiyun static struct sa1100fb_mach_info lart_video_info = {
64*4882a593Smuzhiyun 	.pixclock	= 39721,	.bpp		= 16,
65*4882a593Smuzhiyun 	.xres		= 640,		.yres		= 480,
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 	.hsync_len	= 95,		.vsync_len	= 2,
68*4882a593Smuzhiyun 	.left_margin	= 40,		.upper_margin	= 32,
69*4882a593Smuzhiyun 	.right_margin	= 24,		.lower_margin	= 11,
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
74*4882a593Smuzhiyun 	.lccr3		= LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512),
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun #endif
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun #ifdef LART_KIT01_LCD
79*4882a593Smuzhiyun static struct sa1100fb_mach_info lart_kit01_info = {
80*4882a593Smuzhiyun 	.pixclock	= 63291,	.bpp		= 16,
81*4882a593Smuzhiyun 	.xres		= 640,		.yres		= 480,
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	.hsync_len	= 64,		.vsync_len	= 3,
84*4882a593Smuzhiyun 	.left_margin	= 122,		.upper_margin	= 45,
85*4882a593Smuzhiyun 	.right_margin	= 10,		.lower_margin	= 10,
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun 	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
88*4882a593Smuzhiyun 	.lccr3		= LCCR3_OutEnH | LCCR3_PixFlEdg
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun 
lart_init(void)92*4882a593Smuzhiyun static void __init lart_init(void)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	struct sa1100fb_mach_info *inf = NULL;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #ifdef LART_GREY_LCD
97*4882a593Smuzhiyun 	inf = &lart_grey_info;
98*4882a593Smuzhiyun #endif
99*4882a593Smuzhiyun #ifdef LART_COLOR_LCD
100*4882a593Smuzhiyun 	inf = &lart_color_info;
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun #ifdef LART_VIDEO_OUT
103*4882a593Smuzhiyun 	inf = &lart_video_info;
104*4882a593Smuzhiyun #endif
105*4882a593Smuzhiyun #ifdef LART_KIT01_LCD
106*4882a593Smuzhiyun 	inf = &lart_kit01_info;
107*4882a593Smuzhiyun #endif
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	if (inf)
110*4882a593Smuzhiyun 		sa11x0_register_lcd(inf);
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	sa11x0_ppc_configure_mcp();
113*4882a593Smuzhiyun 	sa11x0_register_mcp(&lart_mcp_data);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun static struct map_desc lart_io_desc[] __initdata = {
117*4882a593Smuzhiyun 	{	/* main flash memory */
118*4882a593Smuzhiyun 		.virtual	=  0xe8000000,
119*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(0x00000000),
120*4882a593Smuzhiyun 		.length		= 0x00400000,
121*4882a593Smuzhiyun 		.type		= MT_DEVICE
122*4882a593Smuzhiyun 	}, {	/* main flash, alternative location */
123*4882a593Smuzhiyun 		.virtual	=  0xec000000,
124*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(0x08000000),
125*4882a593Smuzhiyun 		.length		= 0x00400000,
126*4882a593Smuzhiyun 		.type		= MT_DEVICE
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* LEDs */
131*4882a593Smuzhiyun struct gpio_led lart_gpio_leds[] = {
132*4882a593Smuzhiyun 	{
133*4882a593Smuzhiyun 		.name			= "lart:red",
134*4882a593Smuzhiyun 		.default_trigger	= "cpu0",
135*4882a593Smuzhiyun 		.gpio			= 23,
136*4882a593Smuzhiyun 	},
137*4882a593Smuzhiyun };
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun static struct gpio_led_platform_data lart_gpio_led_info = {
140*4882a593Smuzhiyun 	.leds		= lart_gpio_leds,
141*4882a593Smuzhiyun 	.num_leds	= ARRAY_SIZE(lart_gpio_leds),
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun static struct platform_device lart_leds = {
145*4882a593Smuzhiyun 	.name	= "leds-gpio",
146*4882a593Smuzhiyun 	.id	= -1,
147*4882a593Smuzhiyun 	.dev	= {
148*4882a593Smuzhiyun 		.platform_data	= &lart_gpio_led_info,
149*4882a593Smuzhiyun 	}
150*4882a593Smuzhiyun };
lart_map_io(void)151*4882a593Smuzhiyun static void __init lart_map_io(void)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun 	sa1100_map_io();
154*4882a593Smuzhiyun 	iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc));
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	sa1100_register_uart(0, 3);
157*4882a593Smuzhiyun 	sa1100_register_uart(1, 1);
158*4882a593Smuzhiyun 	sa1100_register_uart(2, 2);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
161*4882a593Smuzhiyun 	GPDR |= GPIO_UART_TXD;
162*4882a593Smuzhiyun 	GPDR &= ~GPIO_UART_RXD;
163*4882a593Smuzhiyun 	PPAR |= PPAR_UPR;
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	platform_device_register(&lart_leds);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun MACHINE_START(LART, "LART")
169*4882a593Smuzhiyun 	.atag_offset	= 0x100,
170*4882a593Smuzhiyun 	.map_io		= lart_map_io,
171*4882a593Smuzhiyun 	.nr_irqs	= SA1100_NR_IRQS,
172*4882a593Smuzhiyun 	.init_irq	= sa1100_init_irq,
173*4882a593Smuzhiyun 	.init_machine	= lart_init,
174*4882a593Smuzhiyun 	.init_late	= sa11x0_init_late,
175*4882a593Smuzhiyun 	.init_time	= sa1100_timer_init,
176*4882a593Smuzhiyun 	.restart	= sa11x0_restart,
177*4882a593Smuzhiyun MACHINE_END
178