1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * arch/arm/mach-sa1100/include/mach/memory.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1999-2000 Nicolas Pitre <nico@fluxnic.net> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef __ASM_ARCH_MEMORY_H 9*4882a593Smuzhiyun #define __ASM_ARCH_MEMORY_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/sizes.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun /* 14*4882a593Smuzhiyun * Because of the wide memory address space between physical RAM banks on the 15*4882a593Smuzhiyun * SA1100, it's much convenient to use Linux's SparseMEM support to implement 16*4882a593Smuzhiyun * our memory map representation. Assuming all memory nodes have equal access 17*4882a593Smuzhiyun * characteristics, we then have generic discontiguous memory support. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * The sparsemem banks are matched with the physical memory bank addresses 20*4882a593Smuzhiyun * which are incidentally the same as virtual addresses. 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * node 0: 0xc0000000 - 0xc7ffffff 23*4882a593Smuzhiyun * node 1: 0xc8000000 - 0xcfffffff 24*4882a593Smuzhiyun * node 2: 0xd0000000 - 0xd7ffffff 25*4882a593Smuzhiyun * node 3: 0xd8000000 - 0xdfffffff 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun #define MAX_PHYSMEM_BITS 32 28*4882a593Smuzhiyun #define SECTION_SIZE_BITS 27 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* 31*4882a593Smuzhiyun * Cache flushing area - SA1100 zero bank 32*4882a593Smuzhiyun */ 33*4882a593Smuzhiyun #define FLUSH_BASE_PHYS 0xe0000000 34*4882a593Smuzhiyun #define FLUSH_BASE 0xf5000000 35*4882a593Smuzhiyun #define FLUSH_BASE_MINICACHE 0xf5100000 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #endif 38