xref: /OK3568_Linux_fs/kernel/arch/arm/mach-sa1100/cerf.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * linux/arch/arm/mach-sa1100/cerf.c
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Apr-2003 : Removed some old PDA crud [FB]
6*4882a593Smuzhiyun  * Oct-2003 : Added uart2 resource [FB]
7*4882a593Smuzhiyun  * Jan-2004 : Removed io map for flash [FB]
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/init.h>
11*4882a593Smuzhiyun #include <linux/gpio/machine.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/tty.h>
14*4882a593Smuzhiyun #include <linux/platform_data/sa11x0-serial.h>
15*4882a593Smuzhiyun #include <linux/platform_device.h>
16*4882a593Smuzhiyun #include <linux/irq.h>
17*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
18*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
19*4882a593Smuzhiyun #include <linux/gpio.h>
20*4882a593Smuzhiyun #include <linux/leds.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <mach/hardware.h>
23*4882a593Smuzhiyun #include <asm/setup.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <asm/mach-types.h>
26*4882a593Smuzhiyun #include <asm/mach/arch.h>
27*4882a593Smuzhiyun #include <asm/mach/flash.h>
28*4882a593Smuzhiyun #include <asm/mach/map.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <mach/cerf.h>
31*4882a593Smuzhiyun #include <linux/platform_data/mfd-mcp-sa11x0.h>
32*4882a593Smuzhiyun #include <mach/irqs.h>
33*4882a593Smuzhiyun #include "generic.h"
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun static struct resource cerfuart2_resources[] = {
36*4882a593Smuzhiyun 	[0] = DEFINE_RES_MEM(0x80030000, SZ_64K),
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun static struct platform_device cerfuart2_device = {
40*4882a593Smuzhiyun 	.name		= "sa11x0-uart",
41*4882a593Smuzhiyun 	.id		= 2,
42*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(cerfuart2_resources),
43*4882a593Smuzhiyun 	.resource	= cerfuart2_resources,
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun /* Compact Flash */
47*4882a593Smuzhiyun static struct gpiod_lookup_table cerf_cf_gpio_table = {
48*4882a593Smuzhiyun 	.dev_id = "sa11x0-pcmcia.1",
49*4882a593Smuzhiyun 	.table = {
50*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 19, "bvd2", GPIO_ACTIVE_HIGH),
51*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 20, "bvd1", GPIO_ACTIVE_HIGH),
52*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 21, "reset", GPIO_ACTIVE_HIGH),
53*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 22, "ready", GPIO_ACTIVE_HIGH),
54*4882a593Smuzhiyun 		GPIO_LOOKUP("gpio", 23, "detect", GPIO_ACTIVE_LOW),
55*4882a593Smuzhiyun 		{ },
56*4882a593Smuzhiyun 	},
57*4882a593Smuzhiyun };
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* LEDs */
60*4882a593Smuzhiyun struct gpio_led cerf_gpio_leds[] = {
61*4882a593Smuzhiyun 	{
62*4882a593Smuzhiyun 		.name			= "cerf:d0",
63*4882a593Smuzhiyun 		.default_trigger	= "heartbeat",
64*4882a593Smuzhiyun 		.gpio			= 0,
65*4882a593Smuzhiyun 	},
66*4882a593Smuzhiyun 	{
67*4882a593Smuzhiyun 		.name			= "cerf:d1",
68*4882a593Smuzhiyun 		.default_trigger	= "cpu0",
69*4882a593Smuzhiyun 		.gpio			= 1,
70*4882a593Smuzhiyun 	},
71*4882a593Smuzhiyun 	{
72*4882a593Smuzhiyun 		.name			= "cerf:d2",
73*4882a593Smuzhiyun 		.default_trigger	= "default-on",
74*4882a593Smuzhiyun 		.gpio			= 2,
75*4882a593Smuzhiyun 	},
76*4882a593Smuzhiyun 	{
77*4882a593Smuzhiyun 		.name			= "cerf:d3",
78*4882a593Smuzhiyun 		.default_trigger	= "default-on",
79*4882a593Smuzhiyun 		.gpio			= 3,
80*4882a593Smuzhiyun 	},
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun static struct gpio_led_platform_data cerf_gpio_led_info = {
85*4882a593Smuzhiyun 	.leds		= cerf_gpio_leds,
86*4882a593Smuzhiyun 	.num_leds	= ARRAY_SIZE(cerf_gpio_leds),
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun static struct platform_device *cerf_devices[] __initdata = {
90*4882a593Smuzhiyun 	&cerfuart2_device,
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #ifdef CONFIG_SA1100_CERF_FLASH_32MB
94*4882a593Smuzhiyun #  define CERF_FLASH_SIZE	0x02000000
95*4882a593Smuzhiyun #elif defined CONFIG_SA1100_CERF_FLASH_16MB
96*4882a593Smuzhiyun #  define CERF_FLASH_SIZE	0x01000000
97*4882a593Smuzhiyun #elif defined CONFIG_SA1100_CERF_FLASH_8MB
98*4882a593Smuzhiyun #  define CERF_FLASH_SIZE	0x00800000
99*4882a593Smuzhiyun #else
100*4882a593Smuzhiyun #  error "Undefined flash size for CERF"
101*4882a593Smuzhiyun #endif
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun static struct mtd_partition cerf_partitions[] = {
104*4882a593Smuzhiyun 	{
105*4882a593Smuzhiyun 		.name		= "Bootloader",
106*4882a593Smuzhiyun 		.size		= 0x00020000,
107*4882a593Smuzhiyun 		.offset		= 0x00000000,
108*4882a593Smuzhiyun 	}, {
109*4882a593Smuzhiyun 		.name		= "Params",
110*4882a593Smuzhiyun 		.size		= 0x00040000,
111*4882a593Smuzhiyun 		.offset		= 0x00020000,
112*4882a593Smuzhiyun 	}, {
113*4882a593Smuzhiyun 		.name		= "Kernel",
114*4882a593Smuzhiyun 		.size		= 0x00100000,
115*4882a593Smuzhiyun 		.offset		= 0x00060000,
116*4882a593Smuzhiyun 	}, {
117*4882a593Smuzhiyun 		.name		= "Filesystem",
118*4882a593Smuzhiyun 		.size		= CERF_FLASH_SIZE-0x00160000,
119*4882a593Smuzhiyun 		.offset		= 0x00160000,
120*4882a593Smuzhiyun 	}
121*4882a593Smuzhiyun };
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun static struct flash_platform_data cerf_flash_data = {
124*4882a593Smuzhiyun 	.map_name	= "cfi_probe",
125*4882a593Smuzhiyun 	.parts		= cerf_partitions,
126*4882a593Smuzhiyun 	.nr_parts	= ARRAY_SIZE(cerf_partitions),
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun static struct resource cerf_flash_resource =
130*4882a593Smuzhiyun 	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
131*4882a593Smuzhiyun 
cerf_init_irq(void)132*4882a593Smuzhiyun static void __init cerf_init_irq(void)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	sa1100_init_irq();
135*4882a593Smuzhiyun 	irq_set_irq_type(CERF_ETH_IRQ, IRQ_TYPE_EDGE_RISING);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun static struct map_desc cerf_io_desc[] __initdata = {
139*4882a593Smuzhiyun   	{	/* Crystal Ethernet Chip */
140*4882a593Smuzhiyun 		.virtual	=  0xf0000000,
141*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(0x08000000),
142*4882a593Smuzhiyun 		.length		= 0x00100000,
143*4882a593Smuzhiyun 		.type		= MT_DEVICE
144*4882a593Smuzhiyun 	}
145*4882a593Smuzhiyun };
146*4882a593Smuzhiyun 
cerf_map_io(void)147*4882a593Smuzhiyun static void __init cerf_map_io(void)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	sa1100_map_io();
150*4882a593Smuzhiyun 	iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	sa1100_register_uart(0, 3);
153*4882a593Smuzhiyun 	sa1100_register_uart(1, 2); /* disable this and the uart2 device for sa1100_fir */
154*4882a593Smuzhiyun 	sa1100_register_uart(2, 1);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun static struct mcp_plat_data cerf_mcp_data = {
158*4882a593Smuzhiyun 	.mccr0		= MCCR0_ADM,
159*4882a593Smuzhiyun 	.sclk_rate	= 11981000,
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun 
cerf_init(void)162*4882a593Smuzhiyun static void __init cerf_init(void)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	sa11x0_ppc_configure_mcp();
165*4882a593Smuzhiyun 	platform_add_devices(cerf_devices, ARRAY_SIZE(cerf_devices));
166*4882a593Smuzhiyun 	gpio_led_register_device(-1, &cerf_gpio_led_info);
167*4882a593Smuzhiyun 	sa11x0_register_mtd(&cerf_flash_data, &cerf_flash_resource, 1);
168*4882a593Smuzhiyun 	sa11x0_register_mcp(&cerf_mcp_data);
169*4882a593Smuzhiyun 	sa11x0_register_pcmcia(1, &cerf_cf_gpio_table);
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun MACHINE_START(CERF, "Intrinsyc CerfBoard/CerfCube")
173*4882a593Smuzhiyun 	/* Maintainer: support@intrinsyc.com */
174*4882a593Smuzhiyun 	.map_io		= cerf_map_io,
175*4882a593Smuzhiyun 	.nr_irqs	= SA1100_NR_IRQS,
176*4882a593Smuzhiyun 	.init_irq	= cerf_init_irq,
177*4882a593Smuzhiyun 	.init_time	= sa1100_timer_init,
178*4882a593Smuzhiyun 	.init_machine	= cerf_init,
179*4882a593Smuzhiyun 	.init_late	= sa11x0_init_late,
180*4882a593Smuzhiyun 	.restart	= sa11x0_restart,
181*4882a593Smuzhiyun MACHINE_END
182