1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-sa1100/badge4.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * BadgePAD 4 specific initialization
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Tim Connors <connors@hpl.hp.com>
8*4882a593Smuzhiyun * Christopher Hoover <ch@hpl.hp.com>
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Copyright (C) 2002 Hewlett-Packard Company
11*4882a593Smuzhiyun */
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/platform_data/sa11x0-serial.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/delay.h>
18*4882a593Smuzhiyun #include <linux/tty.h>
19*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
20*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
21*4882a593Smuzhiyun #include <linux/errno.h>
22*4882a593Smuzhiyun #include <linux/gpio.h>
23*4882a593Smuzhiyun #include <linux/leds.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <mach/hardware.h>
26*4882a593Smuzhiyun #include <asm/mach-types.h>
27*4882a593Smuzhiyun #include <asm/setup.h>
28*4882a593Smuzhiyun #include <mach/irqs.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <asm/mach/arch.h>
31*4882a593Smuzhiyun #include <asm/mach/flash.h>
32*4882a593Smuzhiyun #include <asm/mach/map.h>
33*4882a593Smuzhiyun #include <asm/hardware/sa1111.h>
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include <mach/badge4.h>
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include "generic.h"
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static struct resource sa1111_resources[] = {
40*4882a593Smuzhiyun [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
41*4882a593Smuzhiyun [1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
badge4_sa1111_enable(void * data,unsigned devid)44*4882a593Smuzhiyun static int badge4_sa1111_enable(void *data, unsigned devid)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun if (devid == SA1111_DEVID_USB)
47*4882a593Smuzhiyun badge4_set_5V(BADGE4_5V_USB, 1);
48*4882a593Smuzhiyun return 0;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
badge4_sa1111_disable(void * data,unsigned devid)51*4882a593Smuzhiyun static void badge4_sa1111_disable(void *data, unsigned devid)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun if (devid == SA1111_DEVID_USB)
54*4882a593Smuzhiyun badge4_set_5V(BADGE4_5V_USB, 0);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static struct sa1111_platform_data sa1111_info = {
58*4882a593Smuzhiyun .disable_devs = SA1111_DEVID_PS2_MSE,
59*4882a593Smuzhiyun .enable = badge4_sa1111_enable,
60*4882a593Smuzhiyun .disable = badge4_sa1111_disable,
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static u64 sa1111_dmamask = 0xffffffffUL;
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static struct platform_device sa1111_device = {
66*4882a593Smuzhiyun .name = "sa1111",
67*4882a593Smuzhiyun .id = 0,
68*4882a593Smuzhiyun .dev = {
69*4882a593Smuzhiyun .dma_mask = &sa1111_dmamask,
70*4882a593Smuzhiyun .coherent_dma_mask = 0xffffffff,
71*4882a593Smuzhiyun .platform_data = &sa1111_info,
72*4882a593Smuzhiyun },
73*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(sa1111_resources),
74*4882a593Smuzhiyun .resource = sa1111_resources,
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun /* LEDs */
78*4882a593Smuzhiyun struct gpio_led badge4_gpio_leds[] = {
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun .name = "badge4:red",
81*4882a593Smuzhiyun .default_trigger = "heartbeat",
82*4882a593Smuzhiyun .gpio = 7,
83*4882a593Smuzhiyun },
84*4882a593Smuzhiyun {
85*4882a593Smuzhiyun .name = "badge4:green",
86*4882a593Smuzhiyun .default_trigger = "cpu0",
87*4882a593Smuzhiyun .gpio = 9,
88*4882a593Smuzhiyun },
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static struct gpio_led_platform_data badge4_gpio_led_info = {
92*4882a593Smuzhiyun .leds = badge4_gpio_leds,
93*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(badge4_gpio_leds),
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun static struct platform_device badge4_leds = {
97*4882a593Smuzhiyun .name = "leds-gpio",
98*4882a593Smuzhiyun .id = -1,
99*4882a593Smuzhiyun .dev = {
100*4882a593Smuzhiyun .platform_data = &badge4_gpio_led_info,
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun static struct platform_device *devices[] __initdata = {
105*4882a593Smuzhiyun &sa1111_device,
106*4882a593Smuzhiyun &badge4_leds,
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
badge4_sa1111_init(void)109*4882a593Smuzhiyun static int __init badge4_sa1111_init(void)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun /*
112*4882a593Smuzhiyun * Ensure that the memory bus request/grant signals are setup,
113*4882a593Smuzhiyun * and the grant is held in its inactive state
114*4882a593Smuzhiyun */
115*4882a593Smuzhiyun sa1110_mb_disable();
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /*
118*4882a593Smuzhiyun * Probe for SA1111.
119*4882a593Smuzhiyun */
120*4882a593Smuzhiyun return platform_add_devices(devices, ARRAY_SIZE(devices));
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /*
125*4882a593Smuzhiyun * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
126*4882a593Smuzhiyun * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
127*4882a593Smuzhiyun * Sixty-three 32 KiW Main Blocks (4032 Ki b)
128*4882a593Smuzhiyun *
129*4882a593Smuzhiyun * <or>
130*4882a593Smuzhiyun *
131*4882a593Smuzhiyun * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
132*4882a593Smuzhiyun * Eight 4 KiW Parameter Bottom Blocks (64 KiB)
133*4882a593Smuzhiyun * One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
134*4882a593Smuzhiyun */
135*4882a593Smuzhiyun static struct mtd_partition badge4_partitions[] = {
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun .name = "BLOB boot loader",
138*4882a593Smuzhiyun .offset = 0,
139*4882a593Smuzhiyun .size = 0x0000A000
140*4882a593Smuzhiyun }, {
141*4882a593Smuzhiyun .name = "params",
142*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
143*4882a593Smuzhiyun .size = 0x00006000
144*4882a593Smuzhiyun }, {
145*4882a593Smuzhiyun .name = "root",
146*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
147*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun static struct flash_platform_data badge4_flash_data = {
152*4882a593Smuzhiyun .map_name = "cfi_probe",
153*4882a593Smuzhiyun .parts = badge4_partitions,
154*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(badge4_partitions),
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun static struct resource badge4_flash_resource =
158*4882a593Smuzhiyun DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun static int five_v_on __initdata = 0;
161*4882a593Smuzhiyun
five_v_on_setup(char * ignore)162*4882a593Smuzhiyun static int __init five_v_on_setup(char *ignore)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun five_v_on = 1;
165*4882a593Smuzhiyun return 1;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun __setup("five_v_on", five_v_on_setup);
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun
badge4_init(void)170*4882a593Smuzhiyun static int __init badge4_init(void)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun int ret;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun if (!machine_is_badge4())
175*4882a593Smuzhiyun return -ENODEV;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /* LCD */
178*4882a593Smuzhiyun GPCR = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
179*4882a593Smuzhiyun BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
180*4882a593Smuzhiyun BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
181*4882a593Smuzhiyun BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
182*4882a593Smuzhiyun BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
183*4882a593Smuzhiyun BADGE4_GPIO_GPC_VID);
184*4882a593Smuzhiyun GPDR &= ~BADGE4_GPIO_INT_VID;
185*4882a593Smuzhiyun GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
186*4882a593Smuzhiyun BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
187*4882a593Smuzhiyun BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
188*4882a593Smuzhiyun BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
189*4882a593Smuzhiyun BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
190*4882a593Smuzhiyun BADGE4_GPIO_GPC_VID);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* SDRAM SPD i2c */
193*4882a593Smuzhiyun GPCR = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
194*4882a593Smuzhiyun GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* uart */
197*4882a593Smuzhiyun GPCR = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
198*4882a593Smuzhiyun GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun /* CPLD muxsel0 input for mux/adc chip select */
201*4882a593Smuzhiyun GPCR = BADGE4_GPIO_MUXSEL0;
202*4882a593Smuzhiyun GPDR |= BADGE4_GPIO_MUXSEL0;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun /* test points: J5, J6 as inputs, J7 outputs */
205*4882a593Smuzhiyun GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
206*4882a593Smuzhiyun GPCR = BADGE4_GPIO_TESTPT_J7;
207*4882a593Smuzhiyun GPDR |= BADGE4_GPIO_TESTPT_J7;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /* 5V supply rail. */
210*4882a593Smuzhiyun GPCR = BADGE4_GPIO_PCMEN5V; /* initially off */
211*4882a593Smuzhiyun GPDR |= BADGE4_GPIO_PCMEN5V;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /* CPLD sdram type inputs; set up by blob */
214*4882a593Smuzhiyun //GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
215*4882a593Smuzhiyun printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
216*4882a593Smuzhiyun !!(GPLR & BADGE4_GPIO_SDTYP1),
217*4882a593Smuzhiyun !!(GPLR & BADGE4_GPIO_SDTYP0));
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* SA1111 reset pin; set up by blob */
220*4882a593Smuzhiyun //GPSR = BADGE4_GPIO_SA1111_NRST;
221*4882a593Smuzhiyun //GPDR |= BADGE4_GPIO_SA1111_NRST;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun /* power management cruft */
225*4882a593Smuzhiyun PGSR = 0;
226*4882a593Smuzhiyun PWER = 0;
227*4882a593Smuzhiyun PCFR = 0;
228*4882a593Smuzhiyun PSDR = 0;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun PWER |= PWER_GPIO26; /* wake up on an edge from TESTPT_J5 */
231*4882a593Smuzhiyun PWER |= PWER_RTC; /* wake up if rtc fires */
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /* drive sa1111_nrst during sleep */
234*4882a593Smuzhiyun PGSR |= BADGE4_GPIO_SA1111_NRST;
235*4882a593Smuzhiyun /* drive CPLD as is during sleep */
236*4882a593Smuzhiyun PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* Now bring up the SA-1111. */
240*4882a593Smuzhiyun ret = badge4_sa1111_init();
241*4882a593Smuzhiyun if (ret < 0)
242*4882a593Smuzhiyun printk(KERN_ERR
243*4882a593Smuzhiyun "%s: SA-1111 initialization failed (%d)\n",
244*4882a593Smuzhiyun __func__, ret);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun /* maybe turn on 5v0 from the start */
248*4882a593Smuzhiyun badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun return 0;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun arch_initcall(badge4_init);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun static unsigned badge4_5V_bitmap = 0;
259*4882a593Smuzhiyun
badge4_set_5V(unsigned subsystem,int on)260*4882a593Smuzhiyun void badge4_set_5V(unsigned subsystem, int on)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun unsigned long flags;
263*4882a593Smuzhiyun unsigned old_5V_bitmap;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun local_irq_save(flags);
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun old_5V_bitmap = badge4_5V_bitmap;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun if (on) {
270*4882a593Smuzhiyun badge4_5V_bitmap |= subsystem;
271*4882a593Smuzhiyun } else {
272*4882a593Smuzhiyun badge4_5V_bitmap &= ~subsystem;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun /* detect on->off and off->on transitions */
276*4882a593Smuzhiyun if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
277*4882a593Smuzhiyun /* was off, now on */
278*4882a593Smuzhiyun printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
279*4882a593Smuzhiyun GPSR = BADGE4_GPIO_PCMEN5V;
280*4882a593Smuzhiyun } else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
281*4882a593Smuzhiyun /* was on, now off */
282*4882a593Smuzhiyun printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
283*4882a593Smuzhiyun GPCR = BADGE4_GPIO_PCMEN5V;
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun local_irq_restore(flags);
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun EXPORT_SYMBOL(badge4_set_5V);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun static struct map_desc badge4_io_desc[] __initdata = {
292*4882a593Smuzhiyun { /* SRAM bank 1 */
293*4882a593Smuzhiyun .virtual = 0xf1000000,
294*4882a593Smuzhiyun .pfn = __phys_to_pfn(0x08000000),
295*4882a593Smuzhiyun .length = 0x00100000,
296*4882a593Smuzhiyun .type = MT_DEVICE
297*4882a593Smuzhiyun }, { /* SRAM bank 2 */
298*4882a593Smuzhiyun .virtual = 0xf2000000,
299*4882a593Smuzhiyun .pfn = __phys_to_pfn(0x10000000),
300*4882a593Smuzhiyun .length = 0x00100000,
301*4882a593Smuzhiyun .type = MT_DEVICE
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun };
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun static void
badge4_uart_pm(struct uart_port * port,u_int state,u_int oldstate)306*4882a593Smuzhiyun badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun if (!state) {
309*4882a593Smuzhiyun Ser1SDCR0 |= SDCR0_UART;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun static struct sa1100_port_fns badge4_port_fns __initdata = {
314*4882a593Smuzhiyun .pm = badge4_uart_pm,
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun
badge4_map_io(void)317*4882a593Smuzhiyun static void __init badge4_map_io(void)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun sa1100_map_io();
320*4882a593Smuzhiyun iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun sa1100_register_uart_fns(&badge4_port_fns);
323*4882a593Smuzhiyun sa1100_register_uart(0, 3);
324*4882a593Smuzhiyun sa1100_register_uart(1, 1);
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
328*4882a593Smuzhiyun .atag_offset = 0x100,
329*4882a593Smuzhiyun .map_io = badge4_map_io,
330*4882a593Smuzhiyun .nr_irqs = SA1100_NR_IRQS,
331*4882a593Smuzhiyun .init_irq = sa1100_init_irq,
332*4882a593Smuzhiyun .init_late = sa11x0_init_late,
333*4882a593Smuzhiyun .init_time = sa1100_timer_init,
334*4882a593Smuzhiyun #ifdef CONFIG_SA1111
335*4882a593Smuzhiyun .dma_zone_size = SZ_1M,
336*4882a593Smuzhiyun #endif
337*4882a593Smuzhiyun .restart = sa11x0_restart,
338*4882a593Smuzhiyun MACHINE_END
339