1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/arch/arm/mach-sa1100/assabet.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Nicolas Pitre
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * This file contains all Assabet-specific tweaks.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/init.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/errno.h>
13*4882a593Smuzhiyun #include <linux/gpio/gpio-reg.h>
14*4882a593Smuzhiyun #include <linux/gpio/machine.h>
15*4882a593Smuzhiyun #include <linux/gpio_keys.h>
16*4882a593Smuzhiyun #include <linux/ioport.h>
17*4882a593Smuzhiyun #include <linux/platform_data/sa11x0-serial.h>
18*4882a593Smuzhiyun #include <linux/regulator/fixed.h>
19*4882a593Smuzhiyun #include <linux/regulator/machine.h>
20*4882a593Smuzhiyun #include <linux/serial_core.h>
21*4882a593Smuzhiyun #include <linux/platform_device.h>
22*4882a593Smuzhiyun #include <linux/mfd/ucb1x00.h>
23*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
24*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
25*4882a593Smuzhiyun #include <linux/delay.h>
26*4882a593Smuzhiyun #include <linux/mm.h>
27*4882a593Smuzhiyun #include <linux/leds.h>
28*4882a593Smuzhiyun #include <linux/slab.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #include <video/sa1100fb.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include <mach/hardware.h>
33*4882a593Smuzhiyun #include <asm/mach-types.h>
34*4882a593Smuzhiyun #include <asm/setup.h>
35*4882a593Smuzhiyun #include <asm/page.h>
36*4882a593Smuzhiyun #include <asm/pgtable-hwdef.h>
37*4882a593Smuzhiyun #include <asm/tlbflush.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #include <asm/mach/arch.h>
40*4882a593Smuzhiyun #include <asm/mach/flash.h>
41*4882a593Smuzhiyun #include <linux/platform_data/irda-sa11x0.h>
42*4882a593Smuzhiyun #include <asm/mach/map.h>
43*4882a593Smuzhiyun #include <mach/assabet.h>
44*4882a593Smuzhiyun #include <linux/platform_data/mfd-mcp-sa11x0.h>
45*4882a593Smuzhiyun #include <mach/irqs.h>
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun #include "generic.h"
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define ASSABET_BCR_DB1110 \
50*4882a593Smuzhiyun (ASSABET_BCR_SPK_OFF | \
51*4882a593Smuzhiyun ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
52*4882a593Smuzhiyun ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
53*4882a593Smuzhiyun ASSABET_BCR_IRDA_MD0)
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #define ASSABET_BCR_DB1111 \
56*4882a593Smuzhiyun (ASSABET_BCR_SPK_OFF | \
57*4882a593Smuzhiyun ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \
58*4882a593Smuzhiyun ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \
59*4882a593Smuzhiyun ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
60*4882a593Smuzhiyun ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST)
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun unsigned long SCR_value = ASSABET_SCR_INIT;
63*4882a593Smuzhiyun EXPORT_SYMBOL(SCR_value);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static struct gpio_chip *assabet_bcr_gc;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun static const char *assabet_names[] = {
68*4882a593Smuzhiyun "cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel",
69*4882a593Smuzhiyun "irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on",
70*4882a593Smuzhiyun "audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on",
71*4882a593Smuzhiyun "rs232_on", "nred_led", "ngreen_led", "vib_on",
72*4882a593Smuzhiyun "com_dtr", "com_rts", "radio_wake_mod", "i2c_enab",
73*4882a593Smuzhiyun "tvir_enab", "qmute", "radio_pwr_on", "spkr_off",
74*4882a593Smuzhiyun "rs232_valid", "com_dcd", "com_cts", "com_dsr",
75*4882a593Smuzhiyun "radio_cts", "radio_dsr", "radio_dcd", "radio_ri",
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun /* The old deprecated interface */
ASSABET_BCR_frob(unsigned int mask,unsigned int val)79*4882a593Smuzhiyun void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun unsigned long m = mask, v = val;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun EXPORT_SYMBOL(ASSABET_BCR_frob);
86*4882a593Smuzhiyun
assabet_init_gpio(void __iomem * reg,u32 def_val)87*4882a593Smuzhiyun static int __init assabet_init_gpio(void __iomem *reg, u32 def_val)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct gpio_chip *gc;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun writel_relaxed(def_val, reg);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val,
94*4882a593Smuzhiyun assabet_names, NULL, NULL);
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (IS_ERR(gc))
97*4882a593Smuzhiyun return PTR_ERR(gc);
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun assabet_bcr_gc = gc;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun return gc->base;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /*
105*4882a593Smuzhiyun * The codec reset goes to three devices, so we need to release
106*4882a593Smuzhiyun * the rest when any one of these requests it. However, that
107*4882a593Smuzhiyun * causes the ADV7171 to consume around 100mA - more than half
108*4882a593Smuzhiyun * the LCD-blanked power.
109*4882a593Smuzhiyun *
110*4882a593Smuzhiyun * With the ADV7171, LCD and backlight enabled, we go over
111*4882a593Smuzhiyun * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
112*4882a593Smuzhiyun * is connected, the Assabet crashes.
113*4882a593Smuzhiyun */
114*4882a593Smuzhiyun #define RST_UCB1X00 (1 << 0)
115*4882a593Smuzhiyun #define RST_UDA1341 (1 << 1)
116*4882a593Smuzhiyun #define RST_ADV7171 (1 << 2)
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun #define SDA GPIO_GPIO(15)
119*4882a593Smuzhiyun #define SCK GPIO_GPIO(18)
120*4882a593Smuzhiyun #define MOD GPIO_GPIO(17)
121*4882a593Smuzhiyun
adv7171_start(void)122*4882a593Smuzhiyun static void adv7171_start(void)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun GPSR = SCK;
125*4882a593Smuzhiyun udelay(1);
126*4882a593Smuzhiyun GPSR = SDA;
127*4882a593Smuzhiyun udelay(2);
128*4882a593Smuzhiyun GPCR = SDA;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun
adv7171_stop(void)131*4882a593Smuzhiyun static void adv7171_stop(void)
132*4882a593Smuzhiyun {
133*4882a593Smuzhiyun GPSR = SCK;
134*4882a593Smuzhiyun udelay(2);
135*4882a593Smuzhiyun GPSR = SDA;
136*4882a593Smuzhiyun udelay(1);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
adv7171_send(unsigned byte)139*4882a593Smuzhiyun static void adv7171_send(unsigned byte)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun unsigned i;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun for (i = 0; i < 8; i++, byte <<= 1) {
144*4882a593Smuzhiyun GPCR = SCK;
145*4882a593Smuzhiyun udelay(1);
146*4882a593Smuzhiyun if (byte & 0x80)
147*4882a593Smuzhiyun GPSR = SDA;
148*4882a593Smuzhiyun else
149*4882a593Smuzhiyun GPCR = SDA;
150*4882a593Smuzhiyun udelay(1);
151*4882a593Smuzhiyun GPSR = SCK;
152*4882a593Smuzhiyun udelay(1);
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun GPCR = SCK;
155*4882a593Smuzhiyun udelay(1);
156*4882a593Smuzhiyun GPSR = SDA;
157*4882a593Smuzhiyun udelay(1);
158*4882a593Smuzhiyun GPDR &= ~SDA;
159*4882a593Smuzhiyun GPSR = SCK;
160*4882a593Smuzhiyun udelay(1);
161*4882a593Smuzhiyun if (GPLR & SDA)
162*4882a593Smuzhiyun printk(KERN_WARNING "No ACK from ADV7171\n");
163*4882a593Smuzhiyun udelay(1);
164*4882a593Smuzhiyun GPCR = SCK | SDA;
165*4882a593Smuzhiyun udelay(1);
166*4882a593Smuzhiyun GPDR |= SDA;
167*4882a593Smuzhiyun udelay(1);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
adv7171_write(unsigned reg,unsigned val)170*4882a593Smuzhiyun static void adv7171_write(unsigned reg, unsigned val)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun unsigned gpdr = GPDR;
173*4882a593Smuzhiyun unsigned gplr = GPLR;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON);
176*4882a593Smuzhiyun udelay(100);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
179*4882a593Smuzhiyun GPDR = (GPDR | SCK | MOD) & ~SDA;
180*4882a593Smuzhiyun udelay(10);
181*4882a593Smuzhiyun if (!(GPLR & SDA))
182*4882a593Smuzhiyun printk(KERN_WARNING "Something dragging SDA down?\n");
183*4882a593Smuzhiyun GPDR |= SDA;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun adv7171_start();
186*4882a593Smuzhiyun adv7171_send(0x54);
187*4882a593Smuzhiyun adv7171_send(reg);
188*4882a593Smuzhiyun adv7171_send(val);
189*4882a593Smuzhiyun adv7171_stop();
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun /* Restore GPIO state for L3 bus */
192*4882a593Smuzhiyun GPSR = gplr & (SDA | SCK | MOD);
193*4882a593Smuzhiyun GPCR = (~gplr) & (SDA | SCK | MOD);
194*4882a593Smuzhiyun GPDR = gpdr;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
adv7171_sleep(void)197*4882a593Smuzhiyun static void adv7171_sleep(void)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun /* Put the ADV7171 into sleep mode */
200*4882a593Smuzhiyun adv7171_write(0x04, 0x40);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun static unsigned codec_nreset;
204*4882a593Smuzhiyun
assabet_codec_reset(unsigned mask,int set)205*4882a593Smuzhiyun static void assabet_codec_reset(unsigned mask, int set)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun unsigned long flags;
208*4882a593Smuzhiyun bool old;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun local_irq_save(flags);
211*4882a593Smuzhiyun old = !codec_nreset;
212*4882a593Smuzhiyun if (set)
213*4882a593Smuzhiyun codec_nreset &= ~mask;
214*4882a593Smuzhiyun else
215*4882a593Smuzhiyun codec_nreset |= mask;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun if (old != !codec_nreset) {
218*4882a593Smuzhiyun if (codec_nreset) {
219*4882a593Smuzhiyun ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
220*4882a593Smuzhiyun adv7171_sleep();
221*4882a593Smuzhiyun } else {
222*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun local_irq_restore(flags);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
assabet_ucb1x00_reset(enum ucb1x00_reset state)228*4882a593Smuzhiyun static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
231*4882a593Smuzhiyun state == UCB_RST_PROBE_FAIL;
232*4882a593Smuzhiyun assabet_codec_reset(RST_UCB1X00, set);
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
assabet_uda1341_reset(int set)235*4882a593Smuzhiyun void assabet_uda1341_reset(int set)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun assabet_codec_reset(RST_UDA1341, set);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun EXPORT_SYMBOL(assabet_uda1341_reset);
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /*
243*4882a593Smuzhiyun * Assabet flash support code.
244*4882a593Smuzhiyun */
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun #ifdef ASSABET_REV_4
247*4882a593Smuzhiyun /*
248*4882a593Smuzhiyun * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
249*4882a593Smuzhiyun */
250*4882a593Smuzhiyun static struct mtd_partition assabet_partitions[] = {
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun .name = "bootloader",
253*4882a593Smuzhiyun .size = 0x00020000,
254*4882a593Smuzhiyun .offset = 0,
255*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE,
256*4882a593Smuzhiyun }, {
257*4882a593Smuzhiyun .name = "bootloader params",
258*4882a593Smuzhiyun .size = 0x00020000,
259*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
260*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE,
261*4882a593Smuzhiyun }, {
262*4882a593Smuzhiyun .name = "jffs",
263*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
264*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun };
267*4882a593Smuzhiyun #else
268*4882a593Smuzhiyun /*
269*4882a593Smuzhiyun * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
270*4882a593Smuzhiyun */
271*4882a593Smuzhiyun static struct mtd_partition assabet_partitions[] = {
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun .name = "bootloader",
274*4882a593Smuzhiyun .size = 0x00040000,
275*4882a593Smuzhiyun .offset = 0,
276*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE,
277*4882a593Smuzhiyun }, {
278*4882a593Smuzhiyun .name = "bootloader params",
279*4882a593Smuzhiyun .size = 0x00040000,
280*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
281*4882a593Smuzhiyun .mask_flags = MTD_WRITEABLE,
282*4882a593Smuzhiyun }, {
283*4882a593Smuzhiyun .name = "jffs",
284*4882a593Smuzhiyun .size = MTDPART_SIZ_FULL,
285*4882a593Smuzhiyun .offset = MTDPART_OFS_APPEND,
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun };
288*4882a593Smuzhiyun #endif
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun static struct flash_platform_data assabet_flash_data = {
291*4882a593Smuzhiyun .map_name = "cfi_probe",
292*4882a593Smuzhiyun .parts = assabet_partitions,
293*4882a593Smuzhiyun .nr_parts = ARRAY_SIZE(assabet_partitions),
294*4882a593Smuzhiyun };
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun static struct resource assabet_flash_resources[] = {
297*4882a593Smuzhiyun DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
298*4882a593Smuzhiyun DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /*
303*4882a593Smuzhiyun * Assabet IrDA support code.
304*4882a593Smuzhiyun */
305*4882a593Smuzhiyun
assabet_irda_set_power(struct device * dev,unsigned int state)306*4882a593Smuzhiyun static int assabet_irda_set_power(struct device *dev, unsigned int state)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun static unsigned int bcr_state[4] = {
309*4882a593Smuzhiyun ASSABET_BCR_IRDA_MD0,
310*4882a593Smuzhiyun ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
311*4882a593Smuzhiyun ASSABET_BCR_IRDA_MD1,
312*4882a593Smuzhiyun 0
313*4882a593Smuzhiyun };
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun if (state < 4)
316*4882a593Smuzhiyun ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
317*4882a593Smuzhiyun bcr_state[state]);
318*4882a593Smuzhiyun return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
assabet_irda_set_speed(struct device * dev,unsigned int speed)321*4882a593Smuzhiyun static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun if (speed < 4000000)
324*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
325*4882a593Smuzhiyun else
326*4882a593Smuzhiyun ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
327*4882a593Smuzhiyun }
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun static struct irda_platform_data assabet_irda_data = {
330*4882a593Smuzhiyun .set_power = assabet_irda_set_power,
331*4882a593Smuzhiyun .set_speed = assabet_irda_set_speed,
332*4882a593Smuzhiyun };
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun static struct ucb1x00_plat_data assabet_ucb1x00_data = {
335*4882a593Smuzhiyun .reset = assabet_ucb1x00_reset,
336*4882a593Smuzhiyun .gpio_base = -1,
337*4882a593Smuzhiyun .can_wakeup = 1,
338*4882a593Smuzhiyun };
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun static struct mcp_plat_data assabet_mcp_data = {
341*4882a593Smuzhiyun .mccr0 = MCCR0_ADM,
342*4882a593Smuzhiyun .sclk_rate = 11981000,
343*4882a593Smuzhiyun .codec_pdata = &assabet_ucb1x00_data,
344*4882a593Smuzhiyun };
345*4882a593Smuzhiyun
assabet_lcd_set_visual(u32 visual)346*4882a593Smuzhiyun static void assabet_lcd_set_visual(u32 visual)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun if (machine_is_assabet()) {
351*4882a593Smuzhiyun #if 1 // phase 4 or newer Assabet's
352*4882a593Smuzhiyun if (is_true_color)
353*4882a593Smuzhiyun ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
354*4882a593Smuzhiyun else
355*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
356*4882a593Smuzhiyun #else
357*4882a593Smuzhiyun // older Assabet's
358*4882a593Smuzhiyun if (is_true_color)
359*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
360*4882a593Smuzhiyun else
361*4882a593Smuzhiyun ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
362*4882a593Smuzhiyun #endif
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun #ifndef ASSABET_PAL_VIDEO
assabet_lcd_backlight_power(int on)367*4882a593Smuzhiyun static void assabet_lcd_backlight_power(int on)
368*4882a593Smuzhiyun {
369*4882a593Smuzhiyun if (on)
370*4882a593Smuzhiyun ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
371*4882a593Smuzhiyun else
372*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun /*
376*4882a593Smuzhiyun * Turn on/off the backlight. When turning the backlight on, we wait
377*4882a593Smuzhiyun * 500us after turning it on so we don't cause the supplies to droop
378*4882a593Smuzhiyun * when we enable the LCD controller (and cause a hard reset.)
379*4882a593Smuzhiyun */
assabet_lcd_power(int on)380*4882a593Smuzhiyun static void assabet_lcd_power(int on)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun if (on) {
383*4882a593Smuzhiyun ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
384*4882a593Smuzhiyun udelay(500);
385*4882a593Smuzhiyun } else
386*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /*
390*4882a593Smuzhiyun * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually
391*4882a593Smuzhiyun * takes an RGB666 signal, but we provide it with an RGB565 signal
392*4882a593Smuzhiyun * instead (def_rgb_16).
393*4882a593Smuzhiyun */
394*4882a593Smuzhiyun static struct sa1100fb_mach_info lq039q2ds54_info = {
395*4882a593Smuzhiyun .pixclock = 171521, .bpp = 16,
396*4882a593Smuzhiyun .xres = 320, .yres = 240,
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun .hsync_len = 5, .vsync_len = 1,
399*4882a593Smuzhiyun .left_margin = 61, .upper_margin = 3,
400*4882a593Smuzhiyun .right_margin = 9, .lower_margin = 0,
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
405*4882a593Smuzhiyun .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun .backlight_power = assabet_lcd_backlight_power,
408*4882a593Smuzhiyun .lcd_power = assabet_lcd_power,
409*4882a593Smuzhiyun .set_visual = assabet_lcd_set_visual,
410*4882a593Smuzhiyun };
411*4882a593Smuzhiyun #else
assabet_pal_backlight_power(int on)412*4882a593Smuzhiyun static void assabet_pal_backlight_power(int on)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun
assabet_pal_power(int on)417*4882a593Smuzhiyun static void assabet_pal_power(int on)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun static struct sa1100fb_mach_info pal_info = {
423*4882a593Smuzhiyun .pixclock = 67797, .bpp = 16,
424*4882a593Smuzhiyun .xres = 640, .yres = 512,
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun .hsync_len = 64, .vsync_len = 6,
427*4882a593Smuzhiyun .left_margin = 125, .upper_margin = 70,
428*4882a593Smuzhiyun .right_margin = 115, .lower_margin = 36,
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
431*4882a593Smuzhiyun .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun .backlight_power = assabet_pal_backlight_power,
434*4882a593Smuzhiyun .lcd_power = assabet_pal_power,
435*4882a593Smuzhiyun .set_visual = assabet_lcd_set_visual,
436*4882a593Smuzhiyun };
437*4882a593Smuzhiyun #endif
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun #ifdef CONFIG_ASSABET_NEPONSET
440*4882a593Smuzhiyun static struct resource neponset_resources[] = {
441*4882a593Smuzhiyun DEFINE_RES_MEM(0x10000000, 0x08000000),
442*4882a593Smuzhiyun DEFINE_RES_MEM(0x18000000, 0x04000000),
443*4882a593Smuzhiyun DEFINE_RES_MEM(0x40000000, SZ_8K),
444*4882a593Smuzhiyun DEFINE_RES_IRQ(IRQ_GPIO25),
445*4882a593Smuzhiyun };
446*4882a593Smuzhiyun #endif
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun static struct gpiod_lookup_table assabet_cf_gpio_table = {
449*4882a593Smuzhiyun .dev_id = "sa11x0-pcmcia.1",
450*4882a593Smuzhiyun .table = {
451*4882a593Smuzhiyun GPIO_LOOKUP("gpio", 21, "ready", GPIO_ACTIVE_HIGH),
452*4882a593Smuzhiyun GPIO_LOOKUP("gpio", 22, "detect", GPIO_ACTIVE_LOW),
453*4882a593Smuzhiyun GPIO_LOOKUP("gpio", 24, "bvd2", GPIO_ACTIVE_HIGH),
454*4882a593Smuzhiyun GPIO_LOOKUP("gpio", 25, "bvd1", GPIO_ACTIVE_HIGH),
455*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 1, "reset", GPIO_ACTIVE_HIGH),
456*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 7, "bus-enable", GPIO_ACTIVE_LOW),
457*4882a593Smuzhiyun { },
458*4882a593Smuzhiyun },
459*4882a593Smuzhiyun };
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun static struct regulator_consumer_supply assabet_cf_vcc_consumers[] = {
462*4882a593Smuzhiyun REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
463*4882a593Smuzhiyun };
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun static struct fixed_voltage_config assabet_cf_vcc_pdata __initdata = {
466*4882a593Smuzhiyun .supply_name = "cf-power",
467*4882a593Smuzhiyun .microvolts = 3300000,
468*4882a593Smuzhiyun };
469*4882a593Smuzhiyun
470*4882a593Smuzhiyun static struct gpiod_lookup_table assabet_cf_vcc_gpio_table = {
471*4882a593Smuzhiyun .dev_id = "reg-fixed-voltage.0",
472*4882a593Smuzhiyun .table = {
473*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 0, NULL, GPIO_ACTIVE_HIGH),
474*4882a593Smuzhiyun { },
475*4882a593Smuzhiyun },
476*4882a593Smuzhiyun };
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun static struct gpio_led assabet_leds[] __initdata = {
479*4882a593Smuzhiyun {
480*4882a593Smuzhiyun .name = "assabet:red",
481*4882a593Smuzhiyun .default_trigger = "cpu0",
482*4882a593Smuzhiyun .active_low = 1,
483*4882a593Smuzhiyun .default_state = LEDS_GPIO_DEFSTATE_KEEP,
484*4882a593Smuzhiyun }, {
485*4882a593Smuzhiyun .name = "assabet:green",
486*4882a593Smuzhiyun .default_trigger = "heartbeat",
487*4882a593Smuzhiyun .active_low = 1,
488*4882a593Smuzhiyun .default_state = LEDS_GPIO_DEFSTATE_KEEP,
489*4882a593Smuzhiyun },
490*4882a593Smuzhiyun };
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun static const struct gpio_led_platform_data assabet_leds_pdata __initconst = {
493*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(assabet_leds),
494*4882a593Smuzhiyun .leds = assabet_leds,
495*4882a593Smuzhiyun };
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun static struct gpio_keys_button assabet_keys_buttons[] = {
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun .gpio = 0,
500*4882a593Smuzhiyun .irq = IRQ_GPIO0,
501*4882a593Smuzhiyun .desc = "gpio0",
502*4882a593Smuzhiyun .wakeup = 1,
503*4882a593Smuzhiyun .can_disable = 1,
504*4882a593Smuzhiyun .debounce_interval = 5,
505*4882a593Smuzhiyun }, {
506*4882a593Smuzhiyun .gpio = 1,
507*4882a593Smuzhiyun .irq = IRQ_GPIO1,
508*4882a593Smuzhiyun .desc = "gpio1",
509*4882a593Smuzhiyun .wakeup = 1,
510*4882a593Smuzhiyun .can_disable = 1,
511*4882a593Smuzhiyun .debounce_interval = 5,
512*4882a593Smuzhiyun },
513*4882a593Smuzhiyun };
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun static const struct gpio_keys_platform_data assabet_keys_pdata = {
516*4882a593Smuzhiyun .buttons = assabet_keys_buttons,
517*4882a593Smuzhiyun .nbuttons = ARRAY_SIZE(assabet_keys_buttons),
518*4882a593Smuzhiyun .rep = 0,
519*4882a593Smuzhiyun };
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun static struct gpiod_lookup_table assabet_uart1_gpio_table = {
522*4882a593Smuzhiyun .dev_id = "sa11x0-uart.1",
523*4882a593Smuzhiyun .table = {
524*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 16, "dtr", GPIO_ACTIVE_LOW),
525*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 17, "rts", GPIO_ACTIVE_LOW),
526*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 25, "dcd", GPIO_ACTIVE_LOW),
527*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 26, "cts", GPIO_ACTIVE_LOW),
528*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 27, "dsr", GPIO_ACTIVE_LOW),
529*4882a593Smuzhiyun { },
530*4882a593Smuzhiyun },
531*4882a593Smuzhiyun };
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun static struct gpiod_lookup_table assabet_uart3_gpio_table = {
534*4882a593Smuzhiyun .dev_id = "sa11x0-uart.3",
535*4882a593Smuzhiyun .table = {
536*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 28, "cts", GPIO_ACTIVE_LOW),
537*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 29, "dsr", GPIO_ACTIVE_LOW),
538*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 30, "dcd", GPIO_ACTIVE_LOW),
539*4882a593Smuzhiyun GPIO_LOOKUP("assabet", 31, "rng", GPIO_ACTIVE_LOW),
540*4882a593Smuzhiyun { },
541*4882a593Smuzhiyun },
542*4882a593Smuzhiyun };
543*4882a593Smuzhiyun
assabet_init(void)544*4882a593Smuzhiyun static void __init assabet_init(void)
545*4882a593Smuzhiyun {
546*4882a593Smuzhiyun /*
547*4882a593Smuzhiyun * Ensure that the power supply is in "high power" mode.
548*4882a593Smuzhiyun */
549*4882a593Smuzhiyun GPSR = GPIO_GPIO16;
550*4882a593Smuzhiyun GPDR |= GPIO_GPIO16;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun /*
553*4882a593Smuzhiyun * Ensure that these pins are set as outputs and are driving
554*4882a593Smuzhiyun * logic 0. This ensures that we won't inadvertently toggle
555*4882a593Smuzhiyun * the WS latch in the CPLD, and we don't float causing
556*4882a593Smuzhiyun * excessive power drain. --rmk
557*4882a593Smuzhiyun */
558*4882a593Smuzhiyun GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
559*4882a593Smuzhiyun GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun /*
562*4882a593Smuzhiyun * Also set GPIO27 as an output; this is used to clock UART3
563*4882a593Smuzhiyun * via the FPGA and as otherwise has no pullups or pulldowns,
564*4882a593Smuzhiyun * so stop it floating.
565*4882a593Smuzhiyun */
566*4882a593Smuzhiyun GPCR = GPIO_GPIO27;
567*4882a593Smuzhiyun GPDR |= GPIO_GPIO27;
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun /*
570*4882a593Smuzhiyun * Set up registers for sleep mode.
571*4882a593Smuzhiyun */
572*4882a593Smuzhiyun PWER = PWER_GPIO0;
573*4882a593Smuzhiyun PGSR = 0;
574*4882a593Smuzhiyun PCFR = 0;
575*4882a593Smuzhiyun PSDR = 0;
576*4882a593Smuzhiyun PPDR |= PPC_TXD3 | PPC_TXD1;
577*4882a593Smuzhiyun PPSR |= PPC_TXD3 | PPC_TXD1;
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun sa11x0_ppc_configure_mcp();
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun if (machine_has_neponset()) {
582*4882a593Smuzhiyun #ifndef CONFIG_ASSABET_NEPONSET
583*4882a593Smuzhiyun printk( "Warning: Neponset detected but full support "
584*4882a593Smuzhiyun "hasn't been configured in the kernel\n" );
585*4882a593Smuzhiyun #else
586*4882a593Smuzhiyun platform_device_register_simple("neponset", 0,
587*4882a593Smuzhiyun neponset_resources, ARRAY_SIZE(neponset_resources));
588*4882a593Smuzhiyun #endif
589*4882a593Smuzhiyun } else {
590*4882a593Smuzhiyun gpiod_add_lookup_table(&assabet_uart1_gpio_table);
591*4882a593Smuzhiyun gpiod_add_lookup_table(&assabet_uart3_gpio_table);
592*4882a593Smuzhiyun gpiod_add_lookup_table(&assabet_cf_vcc_gpio_table);
593*4882a593Smuzhiyun
594*4882a593Smuzhiyun sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata,
595*4882a593Smuzhiyun assabet_cf_vcc_consumers,
596*4882a593Smuzhiyun ARRAY_SIZE(assabet_cf_vcc_consumers),
597*4882a593Smuzhiyun true);
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun platform_device_register_resndata(NULL, "gpio-keys", 0,
602*4882a593Smuzhiyun NULL, 0,
603*4882a593Smuzhiyun &assabet_keys_pdata,
604*4882a593Smuzhiyun sizeof(assabet_keys_pdata));
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun gpio_led_register_device(-1, &assabet_leds_pdata);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun #ifndef ASSABET_PAL_VIDEO
609*4882a593Smuzhiyun sa11x0_register_lcd(&lq039q2ds54_info);
610*4882a593Smuzhiyun #else
611*4882a593Smuzhiyun sa11x0_register_lcd(&pal_video);
612*4882a593Smuzhiyun #endif
613*4882a593Smuzhiyun sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
614*4882a593Smuzhiyun ARRAY_SIZE(assabet_flash_resources));
615*4882a593Smuzhiyun sa11x0_register_irda(&assabet_irda_data);
616*4882a593Smuzhiyun sa11x0_register_mcp(&assabet_mcp_data);
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun if (!machine_has_neponset())
619*4882a593Smuzhiyun sa11x0_register_pcmcia(1, &assabet_cf_gpio_table);
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun /*
623*4882a593Smuzhiyun * On Assabet, we must probe for the Neponset board _before_
624*4882a593Smuzhiyun * paging_init() has occurred to actually determine the amount
625*4882a593Smuzhiyun * of RAM available. To do so, we map the appropriate IO section
626*4882a593Smuzhiyun * in the page table here in order to access GPIO registers.
627*4882a593Smuzhiyun */
map_sa1100_gpio_regs(void)628*4882a593Smuzhiyun static void __init map_sa1100_gpio_regs( void )
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun unsigned long phys = __PREG(GPLR) & PMD_MASK;
631*4882a593Smuzhiyun unsigned long virt = (unsigned long)io_p2v(phys);
632*4882a593Smuzhiyun int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
633*4882a593Smuzhiyun pmd_t *pmd;
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun pmd = pmd_off_k(virt);
636*4882a593Smuzhiyun *pmd = __pmd(phys | prot);
637*4882a593Smuzhiyun flush_pmd_entry(pmd);
638*4882a593Smuzhiyun }
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun /*
641*4882a593Smuzhiyun * Read System Configuration "Register"
642*4882a593Smuzhiyun * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
643*4882a593Smuzhiyun * User's Guide", section 4.4.1)
644*4882a593Smuzhiyun *
645*4882a593Smuzhiyun * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
646*4882a593Smuzhiyun * to set up the serial port for decompression status messages. We
647*4882a593Smuzhiyun * repeat it here because the kernel may not be loaded as a zImage, and
648*4882a593Smuzhiyun * also because it's a hassle to communicate the SCR value to the kernel
649*4882a593Smuzhiyun * from the decompressor.
650*4882a593Smuzhiyun *
651*4882a593Smuzhiyun * Note that IRQs are guaranteed to be disabled.
652*4882a593Smuzhiyun */
get_assabet_scr(void)653*4882a593Smuzhiyun static void __init get_assabet_scr(void)
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun unsigned long scr, i;
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
658*4882a593Smuzhiyun GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
659*4882a593Smuzhiyun GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
660*4882a593Smuzhiyun for(i = 100; i--; ) /* Read GPIO 9:2 */
661*4882a593Smuzhiyun scr = GPLR;
662*4882a593Smuzhiyun GPDR |= 0x3fc; /* restore correct pin direction */
663*4882a593Smuzhiyun scr &= 0x3fc; /* save as system configuration byte. */
664*4882a593Smuzhiyun SCR_value = scr;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun static void __init
fixup_assabet(struct tag * tags,char ** cmdline)668*4882a593Smuzhiyun fixup_assabet(struct tag *tags, char **cmdline)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun /* This must be done before any call to machine_has_neponset() */
671*4882a593Smuzhiyun map_sa1100_gpio_regs();
672*4882a593Smuzhiyun get_assabet_scr();
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun if (machine_has_neponset())
675*4882a593Smuzhiyun printk("Neponset expansion board detected\n");
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun
assabet_uart_pm(struct uart_port * port,u_int state,u_int oldstate)679*4882a593Smuzhiyun static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun if (port->mapbase == _Ser1UTCR0) {
682*4882a593Smuzhiyun if (state)
683*4882a593Smuzhiyun ASSABET_BCR_clear(ASSABET_BCR_RS232EN);
684*4882a593Smuzhiyun else
685*4882a593Smuzhiyun ASSABET_BCR_set(ASSABET_BCR_RS232EN);
686*4882a593Smuzhiyun }
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun static struct sa1100_port_fns assabet_port_fns __initdata = {
690*4882a593Smuzhiyun .pm = assabet_uart_pm,
691*4882a593Smuzhiyun };
692*4882a593Smuzhiyun
693*4882a593Smuzhiyun static struct map_desc assabet_io_desc[] __initdata = {
694*4882a593Smuzhiyun { /* Board Control Register */
695*4882a593Smuzhiyun .virtual = 0xf1000000,
696*4882a593Smuzhiyun .pfn = __phys_to_pfn(0x12000000),
697*4882a593Smuzhiyun .length = 0x00100000,
698*4882a593Smuzhiyun .type = MT_DEVICE
699*4882a593Smuzhiyun }, { /* MQ200 */
700*4882a593Smuzhiyun .virtual = 0xf2800000,
701*4882a593Smuzhiyun .pfn = __phys_to_pfn(0x4b800000),
702*4882a593Smuzhiyun .length = 0x00800000,
703*4882a593Smuzhiyun .type = MT_DEVICE
704*4882a593Smuzhiyun }
705*4882a593Smuzhiyun };
706*4882a593Smuzhiyun
assabet_map_io(void)707*4882a593Smuzhiyun static void __init assabet_map_io(void)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun sa1100_map_io();
710*4882a593Smuzhiyun iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun /*
713*4882a593Smuzhiyun * Set SUS bit in SDCR0 so serial port 1 functions.
714*4882a593Smuzhiyun * Its called GPCLKR0 in my SA1110 manual.
715*4882a593Smuzhiyun */
716*4882a593Smuzhiyun Ser1SDCR0 |= SDCR0_SUS;
717*4882a593Smuzhiyun MSC1 = (MSC1 & ~0xffff) |
718*4882a593Smuzhiyun MSC_NonBrst | MSC_32BitStMem |
719*4882a593Smuzhiyun MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
720*4882a593Smuzhiyun
721*4882a593Smuzhiyun if (!machine_has_neponset())
722*4882a593Smuzhiyun sa1100_register_uart_fns(&assabet_port_fns);
723*4882a593Smuzhiyun
724*4882a593Smuzhiyun /*
725*4882a593Smuzhiyun * When Neponset is attached, the first UART should be
726*4882a593Smuzhiyun * UART3. That's what Angel is doing and many documents
727*4882a593Smuzhiyun * are stating this.
728*4882a593Smuzhiyun *
729*4882a593Smuzhiyun * We do the Neponset mapping even if Neponset support
730*4882a593Smuzhiyun * isn't compiled in so the user will still get something on
731*4882a593Smuzhiyun * the expected physical serial port.
732*4882a593Smuzhiyun *
733*4882a593Smuzhiyun * We no longer do this; not all boot loaders support it,
734*4882a593Smuzhiyun * and UART3 appears to be somewhat unreliable with blob.
735*4882a593Smuzhiyun */
736*4882a593Smuzhiyun sa1100_register_uart(0, 1);
737*4882a593Smuzhiyun sa1100_register_uart(2, 3);
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun
assabet_init_irq(void)740*4882a593Smuzhiyun void __init assabet_init_irq(void)
741*4882a593Smuzhiyun {
742*4882a593Smuzhiyun unsigned int assabet_gpio_base;
743*4882a593Smuzhiyun u32 def_val;
744*4882a593Smuzhiyun
745*4882a593Smuzhiyun sa1100_init_irq();
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun if (machine_has_neponset())
748*4882a593Smuzhiyun def_val = ASSABET_BCR_DB1111;
749*4882a593Smuzhiyun else
750*4882a593Smuzhiyun def_val = ASSABET_BCR_DB1110;
751*4882a593Smuzhiyun
752*4882a593Smuzhiyun /*
753*4882a593Smuzhiyun * Angel sets this, but other bootloaders may not.
754*4882a593Smuzhiyun *
755*4882a593Smuzhiyun * This must precede any driver calls to BCR_set() or BCR_clear().
756*4882a593Smuzhiyun */
757*4882a593Smuzhiyun assabet_gpio_base = assabet_init_gpio((void *)&ASSABET_BCR, def_val);
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun assabet_leds[0].gpio = assabet_gpio_base + 13;
760*4882a593Smuzhiyun assabet_leds[1].gpio = assabet_gpio_base + 14;
761*4882a593Smuzhiyun }
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun MACHINE_START(ASSABET, "Intel-Assabet")
764*4882a593Smuzhiyun .atag_offset = 0x100,
765*4882a593Smuzhiyun .fixup = fixup_assabet,
766*4882a593Smuzhiyun .map_io = assabet_map_io,
767*4882a593Smuzhiyun .nr_irqs = SA1100_NR_IRQS,
768*4882a593Smuzhiyun .init_irq = assabet_init_irq,
769*4882a593Smuzhiyun .init_time = sa1100_timer_init,
770*4882a593Smuzhiyun .init_machine = assabet_init,
771*4882a593Smuzhiyun .init_late = sa11x0_init_late,
772*4882a593Smuzhiyun #ifdef CONFIG_SA1111
773*4882a593Smuzhiyun .dma_zone_size = SZ_1M,
774*4882a593Smuzhiyun #endif
775*4882a593Smuzhiyun .restart = sa11x0_restart,
776*4882a593Smuzhiyun MACHINE_END
777