1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun // 3*4882a593Smuzhiyun // Copyright 2009 Simtec Electronics 4*4882a593Smuzhiyun // Ben Dooks <ben@simtec.co.uk> 5*4882a593Smuzhiyun // http://armlinux.simtec.co.uk/ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /* 8*4882a593Smuzhiyun * NOTE: Code in this file is not used when booting with Device Tree support. 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/kernel.h> 12*4882a593Smuzhiyun #include <linux/types.h> 13*4882a593Smuzhiyun #include <linux/interrupt.h> 14*4882a593Smuzhiyun #include <linux/list.h> 15*4882a593Smuzhiyun #include <linux/timer.h> 16*4882a593Smuzhiyun #include <linux/init.h> 17*4882a593Smuzhiyun #include <linux/clk.h> 18*4882a593Smuzhiyun #include <linux/io.h> 19*4882a593Smuzhiyun #include <linux/device.h> 20*4882a593Smuzhiyun #include <linux/serial_core.h> 21*4882a593Smuzhiyun #include <linux/serial_s3c.h> 22*4882a593Smuzhiyun #include <linux/platform_device.h> 23*4882a593Smuzhiyun #include <linux/of.h> 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #include <asm/mach/arch.h> 26*4882a593Smuzhiyun #include <asm/mach/map.h> 27*4882a593Smuzhiyun #include <asm/mach/irq.h> 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #include <asm/irq.h> 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #include "regs-clock.h" 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #include "cpu.h" 34*4882a593Smuzhiyun #include "devs.h" 35*4882a593Smuzhiyun #include "sdhci.h" 36*4882a593Smuzhiyun #include "iic-core.h" 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #include "s3c64xx.h" 39*4882a593Smuzhiyun #include "onenand-core-s3c64xx.h" 40*4882a593Smuzhiyun s3c6400_map_io(void)41*4882a593Smuzhiyunvoid __init s3c6400_map_io(void) 42*4882a593Smuzhiyun { 43*4882a593Smuzhiyun /* setup SDHCI */ 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun s3c6400_default_sdhci0(); 46*4882a593Smuzhiyun s3c6400_default_sdhci1(); 47*4882a593Smuzhiyun s3c6400_default_sdhci2(); 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* the i2c devices are directly compatible with s3c2440 */ 50*4882a593Smuzhiyun s3c_i2c0_setname("s3c2440-i2c"); 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun s3c_device_nand.name = "s3c6400-nand"; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun s3c_onenand_setname("s3c6400-onenand"); 55*4882a593Smuzhiyun s3c64xx_onenand1_setname("s3c6400-onenand"); 56*4882a593Smuzhiyun } 57*4882a593Smuzhiyun s3c6400_init_irq(void)58*4882a593Smuzhiyunvoid __init s3c6400_init_irq(void) 59*4882a593Smuzhiyun { 60*4882a593Smuzhiyun /* VIC0 does not have IRQS 5..7, 61*4882a593Smuzhiyun * VIC1 is fully populated. */ 62*4882a593Smuzhiyun s3c64xx_init_irq(~0 & ~(0xf << 5), ~0); 63*4882a593Smuzhiyun } 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun static struct bus_type s3c6400_subsys = { 66*4882a593Smuzhiyun .name = "s3c6400-core", 67*4882a593Smuzhiyun .dev_name = "s3c6400-core", 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun static struct device s3c6400_dev = { 71*4882a593Smuzhiyun .bus = &s3c6400_subsys, 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun s3c6400_core_init(void)74*4882a593Smuzhiyunstatic int __init s3c6400_core_init(void) 75*4882a593Smuzhiyun { 76*4882a593Smuzhiyun /* Not applicable when using DT. */ 77*4882a593Smuzhiyun if (of_have_populated_dt() || soc_is_s3c64xx()) 78*4882a593Smuzhiyun return 0; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun return subsys_system_register(&s3c6400_subsys, NULL); 81*4882a593Smuzhiyun } 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun core_initcall(s3c6400_core_init); 84*4882a593Smuzhiyun s3c6400_init(void)85*4882a593Smuzhiyunint __init s3c6400_init(void) 86*4882a593Smuzhiyun { 87*4882a593Smuzhiyun printk("S3C6400: Initialising architecture\n"); 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun return device_register(&s3c6400_dev); 90*4882a593Smuzhiyun } 91