1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+ 2*4882a593Smuzhiyun // 3*4882a593Smuzhiyun // Copyright (c) 2004-2005 Simtec Electronics 4*4882a593Smuzhiyun // http://armlinux.simtec.co.uk/ 5*4882a593Smuzhiyun // Ben Dooks <ben@simtec.co.uk> 6*4882a593Smuzhiyun // 7*4882a593Smuzhiyun // S3C2442 core and lock support 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include <linux/init.h> 10*4882a593Smuzhiyun #include <linux/module.h> 11*4882a593Smuzhiyun #include <linux/kernel.h> 12*4882a593Smuzhiyun #include <linux/list.h> 13*4882a593Smuzhiyun #include <linux/errno.h> 14*4882a593Smuzhiyun #include <linux/err.h> 15*4882a593Smuzhiyun #include <linux/device.h> 16*4882a593Smuzhiyun #include <linux/syscore_ops.h> 17*4882a593Smuzhiyun #include <linux/interrupt.h> 18*4882a593Smuzhiyun #include <linux/ioport.h> 19*4882a593Smuzhiyun #include <linux/mutex.h> 20*4882a593Smuzhiyun #include <linux/gpio.h> 21*4882a593Smuzhiyun #include <linux/clk.h> 22*4882a593Smuzhiyun #include <linux/io.h> 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #include <linux/atomic.h> 25*4882a593Smuzhiyun #include <asm/irq.h> 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #include "regs-clock.h" 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #include "cpu.h" 30*4882a593Smuzhiyun #include "pm.h" 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #include "gpio-core.h" 33*4882a593Smuzhiyun #include "gpio-cfg.h" 34*4882a593Smuzhiyun #include "gpio-cfg-helpers.h" 35*4882a593Smuzhiyun #include "gpio-samsung.h" 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #include "s3c24xx.h" 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun static struct device s3c2442_dev = { 40*4882a593Smuzhiyun .bus = &s3c2442_subsys, 41*4882a593Smuzhiyun }; 42*4882a593Smuzhiyun s3c2442_init(void)43*4882a593Smuzhiyunint __init s3c2442_init(void) 44*4882a593Smuzhiyun { 45*4882a593Smuzhiyun printk("S3C2442: Initialising architecture\n"); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP 48*4882a593Smuzhiyun register_syscore_ops(&s3c2410_pm_syscore_ops); 49*4882a593Smuzhiyun register_syscore_ops(&s3c24xx_irq_syscore_ops); 50*4882a593Smuzhiyun register_syscore_ops(&s3c244x_pm_syscore_ops); 51*4882a593Smuzhiyun #endif 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun return device_register(&s3c2442_dev); 54*4882a593Smuzhiyun } 55*4882a593Smuzhiyun s3c2442_map_io(void)56*4882a593Smuzhiyunvoid __init s3c2442_map_io(void) 57*4882a593Smuzhiyun { 58*4882a593Smuzhiyun s3c244x_map_io(); 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1down; 61*4882a593Smuzhiyun s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1down; 62*4882a593Smuzhiyun } 63