1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2003-2006 Simtec Electronics <linux@simtec.co.uk> 4*4882a593Smuzhiyun * http://armlinux.simtec.co.uk/ 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H 8*4882a593Smuzhiyun #define __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H __FILE__ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define S3C24XX_PWRREG(x) ((x) + S3C24XX_VA_CLKPWR) 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define S3C2412_PWRMODECON S3C24XX_PWRREG(0x20) 13*4882a593Smuzhiyun #define S3C2412_PWRCFG S3C24XX_PWRREG(0x24) 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define S3C2412_INFORM0 S3C24XX_PWRREG(0x70) 16*4882a593Smuzhiyun #define S3C2412_INFORM1 S3C24XX_PWRREG(0x74) 17*4882a593Smuzhiyun #define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) 18*4882a593Smuzhiyun #define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #define S3C2412_PWRCFG_BATF_IRQ (1 << 0) 21*4882a593Smuzhiyun #define S3C2412_PWRCFG_BATF_IGNORE (2 << 0) 22*4882a593Smuzhiyun #define S3C2412_PWRCFG_BATF_SLEEP (3 << 0) 23*4882a593Smuzhiyun #define S3C2412_PWRCFG_BATF_MASK (3 << 0) 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define S3C2412_PWRCFG_STANDBYWFI_IGNORE (0 << 6) 26*4882a593Smuzhiyun #define S3C2412_PWRCFG_STANDBYWFI_IDLE (1 << 6) 27*4882a593Smuzhiyun #define S3C2412_PWRCFG_STANDBYWFI_STOP (2 << 6) 28*4882a593Smuzhiyun #define S3C2412_PWRCFG_STANDBYWFI_SLEEP (3 << 6) 29*4882a593Smuzhiyun #define S3C2412_PWRCFG_STANDBYWFI_MASK (3 << 6) 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun #define S3C2412_PWRCFG_RTC_MASKIRQ (1 << 8) 32*4882a593Smuzhiyun #define S3C2412_PWRCFG_NAND_NORST (1 << 9) 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun #endif /* __ARCH_ARM_MACH_S3C24XX_S3C2412_POWER_H */ 35