1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2008 Openmoko, Inc. 4*4882a593Smuzhiyun * Copyright 2008 Simtec Electronics 5*4882a593Smuzhiyun * Ben Dooks <ben@simtec.co.uk> 6*4882a593Smuzhiyun * http://armlinux.simtec.co.uk/ 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * S3C64XX - GPIO memory port register definitions 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H 12*4882a593Smuzhiyun #define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0) 15*4882a593Smuzhiyun #define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define S3C64XX_MEM0CONSLP0 S3C64XX_GPIOREG(0x1C0) 18*4882a593Smuzhiyun #define S3C64XX_MEM0CONSLP1 S3C64XX_GPIOREG(0x1C4) 19*4882a593Smuzhiyun #define S3C64XX_MEM1CONSLP S3C64XX_GPIOREG(0x1C8) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0) 22*4882a593Smuzhiyun #define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4) 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */ 25*4882a593Smuzhiyun 26