xref: /OK3568_Linux_fs/kernel/arch/arm/mach-s3c/mach-vr1000.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (c) 2003-2008 Simtec Electronics
4*4882a593Smuzhiyun //   Ben Dooks <ben@simtec.co.uk>
5*4882a593Smuzhiyun //
6*4882a593Smuzhiyun // Machine support for Thorcom VR1000 board. Designed for Thorcom by
7*4882a593Smuzhiyun // Simtec Electronics, http://www.simtec.co.uk/
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/types.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/list.h>
13*4882a593Smuzhiyun #include <linux/timer.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/gpio.h>
16*4882a593Smuzhiyun #include <linux/gpio/machine.h>
17*4882a593Smuzhiyun #include <linux/dm9000.h>
18*4882a593Smuzhiyun #include <linux/i2c.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/serial.h>
21*4882a593Smuzhiyun #include <linux/tty.h>
22*4882a593Smuzhiyun #include <linux/serial_8250.h>
23*4882a593Smuzhiyun #include <linux/serial_reg.h>
24*4882a593Smuzhiyun #include <linux/serial_s3c.h>
25*4882a593Smuzhiyun #include <linux/io.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <asm/mach/arch.h>
28*4882a593Smuzhiyun #include <asm/mach/map.h>
29*4882a593Smuzhiyun #include <asm/mach/irq.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #include <asm/irq.h>
32*4882a593Smuzhiyun #include <asm/mach-types.h>
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #include <linux/platform_data/leds-s3c24xx.h>
35*4882a593Smuzhiyun #include <linux/platform_data/i2c-s3c2410.h>
36*4882a593Smuzhiyun #include <linux/platform_data/asoc-s3c24xx_simtec.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #include "regs-gpio.h"
39*4882a593Smuzhiyun #include "gpio-samsung.h"
40*4882a593Smuzhiyun #include "gpio-cfg.h"
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #include "cpu.h"
43*4882a593Smuzhiyun #include "devs.h"
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun #include "bast.h"
46*4882a593Smuzhiyun #include "s3c24xx.h"
47*4882a593Smuzhiyun #include "simtec.h"
48*4882a593Smuzhiyun #include "vr1000.h"
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* macros for virtual address mods for the io space entries */
51*4882a593Smuzhiyun #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
52*4882a593Smuzhiyun #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
53*4882a593Smuzhiyun #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
54*4882a593Smuzhiyun #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun /* macros to modify the physical addresses for io space */
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
59*4882a593Smuzhiyun #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
60*4882a593Smuzhiyun #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
61*4882a593Smuzhiyun #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun static struct map_desc vr1000_iodesc[] __initdata = {
64*4882a593Smuzhiyun   /* ISA IO areas */
65*4882a593Smuzhiyun   {
66*4882a593Smuzhiyun 	  .virtual	= (u32)S3C24XX_VA_ISA_BYTE,
67*4882a593Smuzhiyun 	  .pfn		= PA_CS2(BAST_PA_ISAIO),
68*4882a593Smuzhiyun 	  .length	= SZ_16M,
69*4882a593Smuzhiyun 	  .type		= MT_DEVICE,
70*4882a593Smuzhiyun   }, {
71*4882a593Smuzhiyun 	  .virtual	= (u32)S3C24XX_VA_ISA_WORD,
72*4882a593Smuzhiyun 	  .pfn		= PA_CS3(BAST_PA_ISAIO),
73*4882a593Smuzhiyun 	  .length	= SZ_16M,
74*4882a593Smuzhiyun 	  .type		= MT_DEVICE,
75*4882a593Smuzhiyun   },
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun   /*  CPLD control registers, and external interrupt controls */
78*4882a593Smuzhiyun   {
79*4882a593Smuzhiyun 	  .virtual	= (u32)VR1000_VA_CTRL1,
80*4882a593Smuzhiyun 	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL1),
81*4882a593Smuzhiyun 	  .length	= SZ_1M,
82*4882a593Smuzhiyun 	  .type		= MT_DEVICE,
83*4882a593Smuzhiyun   }, {
84*4882a593Smuzhiyun 	  .virtual	= (u32)VR1000_VA_CTRL2,
85*4882a593Smuzhiyun 	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL2),
86*4882a593Smuzhiyun 	  .length	= SZ_1M,
87*4882a593Smuzhiyun 	  .type		= MT_DEVICE,
88*4882a593Smuzhiyun   }, {
89*4882a593Smuzhiyun 	  .virtual	= (u32)VR1000_VA_CTRL3,
90*4882a593Smuzhiyun 	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL3),
91*4882a593Smuzhiyun 	  .length	= SZ_1M,
92*4882a593Smuzhiyun 	  .type		= MT_DEVICE,
93*4882a593Smuzhiyun   }, {
94*4882a593Smuzhiyun 	  .virtual	= (u32)VR1000_VA_CTRL4,
95*4882a593Smuzhiyun 	  .pfn		= __phys_to_pfn(VR1000_PA_CTRL4),
96*4882a593Smuzhiyun 	  .length	= SZ_1M,
97*4882a593Smuzhiyun 	  .type		= MT_DEVICE,
98*4882a593Smuzhiyun   },
99*4882a593Smuzhiyun };
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
102*4882a593Smuzhiyun #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
103*4882a593Smuzhiyun #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
106*4882a593Smuzhiyun 	[0] = {
107*4882a593Smuzhiyun 		.hwport	     = 0,
108*4882a593Smuzhiyun 		.flags	     = 0,
109*4882a593Smuzhiyun 		.ucon	     = UCON,
110*4882a593Smuzhiyun 		.ulcon	     = ULCON,
111*4882a593Smuzhiyun 		.ufcon	     = UFCON,
112*4882a593Smuzhiyun 	},
113*4882a593Smuzhiyun 	[1] = {
114*4882a593Smuzhiyun 		.hwport	     = 1,
115*4882a593Smuzhiyun 		.flags	     = 0,
116*4882a593Smuzhiyun 		.ucon	     = UCON,
117*4882a593Smuzhiyun 		.ulcon	     = ULCON,
118*4882a593Smuzhiyun 		.ufcon	     = UFCON,
119*4882a593Smuzhiyun 	},
120*4882a593Smuzhiyun 	/* port 2 is not actually used */
121*4882a593Smuzhiyun 	[2] = {
122*4882a593Smuzhiyun 		.hwport	     = 2,
123*4882a593Smuzhiyun 		.flags	     = 0,
124*4882a593Smuzhiyun 		.ucon	     = UCON,
125*4882a593Smuzhiyun 		.ulcon	     = ULCON,
126*4882a593Smuzhiyun 		.ufcon	     = UFCON,
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun /* definitions for the vr1000 extra 16550 serial ports */
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun #define VR1000_BAUDBASE (3692307)
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun static struct plat_serial8250_port serial_platform_data[] = {
137*4882a593Smuzhiyun 	[0] = {
138*4882a593Smuzhiyun 		.mapbase	= VR1000_SERIAL_MAPBASE(0),
139*4882a593Smuzhiyun 		.irq		= VR1000_IRQ_SERIAL + 0,
140*4882a593Smuzhiyun 		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
141*4882a593Smuzhiyun 		.iotype		= UPIO_MEM,
142*4882a593Smuzhiyun 		.regshift	= 0,
143*4882a593Smuzhiyun 		.uartclk	= VR1000_BAUDBASE,
144*4882a593Smuzhiyun 	},
145*4882a593Smuzhiyun 	[1] = {
146*4882a593Smuzhiyun 		.mapbase	= VR1000_SERIAL_MAPBASE(1),
147*4882a593Smuzhiyun 		.irq		= VR1000_IRQ_SERIAL + 1,
148*4882a593Smuzhiyun 		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
149*4882a593Smuzhiyun 		.iotype		= UPIO_MEM,
150*4882a593Smuzhiyun 		.regshift	= 0,
151*4882a593Smuzhiyun 		.uartclk	= VR1000_BAUDBASE,
152*4882a593Smuzhiyun 	},
153*4882a593Smuzhiyun 	[2] = {
154*4882a593Smuzhiyun 		.mapbase	= VR1000_SERIAL_MAPBASE(2),
155*4882a593Smuzhiyun 		.irq		= VR1000_IRQ_SERIAL + 2,
156*4882a593Smuzhiyun 		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
157*4882a593Smuzhiyun 		.iotype		= UPIO_MEM,
158*4882a593Smuzhiyun 		.regshift	= 0,
159*4882a593Smuzhiyun 		.uartclk	= VR1000_BAUDBASE,
160*4882a593Smuzhiyun 	},
161*4882a593Smuzhiyun 	[3] = {
162*4882a593Smuzhiyun 		.mapbase	= VR1000_SERIAL_MAPBASE(3),
163*4882a593Smuzhiyun 		.irq		= VR1000_IRQ_SERIAL + 3,
164*4882a593Smuzhiyun 		.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,
165*4882a593Smuzhiyun 		.iotype		= UPIO_MEM,
166*4882a593Smuzhiyun 		.regshift	= 0,
167*4882a593Smuzhiyun 		.uartclk	= VR1000_BAUDBASE,
168*4882a593Smuzhiyun 	},
169*4882a593Smuzhiyun 	{ },
170*4882a593Smuzhiyun };
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun static struct platform_device serial_device = {
173*4882a593Smuzhiyun 	.name			= "serial8250",
174*4882a593Smuzhiyun 	.id			= PLAT8250_DEV_PLATFORM,
175*4882a593Smuzhiyun 	.dev			= {
176*4882a593Smuzhiyun 		.platform_data	= serial_platform_data,
177*4882a593Smuzhiyun 	},
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun /* DM9000 ethernet devices */
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun static struct resource vr1000_dm9k0_resource[] = {
183*4882a593Smuzhiyun 	[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4),
184*4882a593Smuzhiyun 	[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40),
185*4882a593Smuzhiyun 	[2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000A, 1, NULL, IORESOURCE_IRQ \
186*4882a593Smuzhiyun 						| IORESOURCE_IRQ_HIGHLEVEL),
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun static struct resource vr1000_dm9k1_resource[] = {
190*4882a593Smuzhiyun 	[0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4),
191*4882a593Smuzhiyun 	[1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
192*4882a593Smuzhiyun 	[2] = DEFINE_RES_NAMED(VR1000_IRQ_DM9000N, 1, NULL, IORESOURCE_IRQ \
193*4882a593Smuzhiyun 						| IORESOURCE_IRQ_HIGHLEVEL),
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun /* for the moment we limit ourselves to 16bit IO until some
197*4882a593Smuzhiyun  * better IO routines can be written and tested
198*4882a593Smuzhiyun */
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun static struct dm9000_plat_data vr1000_dm9k_platdata = {
201*4882a593Smuzhiyun 	.flags		= DM9000_PLATF_16BITONLY,
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun static struct platform_device vr1000_dm9k0 = {
205*4882a593Smuzhiyun 	.name		= "dm9000",
206*4882a593Smuzhiyun 	.id		= 0,
207*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(vr1000_dm9k0_resource),
208*4882a593Smuzhiyun 	.resource	= vr1000_dm9k0_resource,
209*4882a593Smuzhiyun 	.dev		= {
210*4882a593Smuzhiyun 		.platform_data = &vr1000_dm9k_platdata,
211*4882a593Smuzhiyun 	}
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun static struct platform_device vr1000_dm9k1 = {
215*4882a593Smuzhiyun 	.name		= "dm9000",
216*4882a593Smuzhiyun 	.id		= 1,
217*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(vr1000_dm9k1_resource),
218*4882a593Smuzhiyun 	.resource	= vr1000_dm9k1_resource,
219*4882a593Smuzhiyun 	.dev		= {
220*4882a593Smuzhiyun 		.platform_data = &vr1000_dm9k_platdata,
221*4882a593Smuzhiyun 	}
222*4882a593Smuzhiyun };
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun /* LEDS */
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun static struct gpiod_lookup_table vr1000_led1_gpio_table = {
227*4882a593Smuzhiyun 	.dev_id = "s3c24xx_led.1",
228*4882a593Smuzhiyun 	.table = {
229*4882a593Smuzhiyun 		GPIO_LOOKUP("GPB", 0, NULL, GPIO_ACTIVE_HIGH),
230*4882a593Smuzhiyun 		{ },
231*4882a593Smuzhiyun 	},
232*4882a593Smuzhiyun };
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun static struct gpiod_lookup_table vr1000_led2_gpio_table = {
235*4882a593Smuzhiyun 	.dev_id = "s3c24xx_led.2",
236*4882a593Smuzhiyun 	.table = {
237*4882a593Smuzhiyun 		GPIO_LOOKUP("GPB", 1, NULL, GPIO_ACTIVE_HIGH),
238*4882a593Smuzhiyun 		{ },
239*4882a593Smuzhiyun 	},
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun static struct gpiod_lookup_table vr1000_led3_gpio_table = {
243*4882a593Smuzhiyun 	.dev_id = "s3c24xx_led.3",
244*4882a593Smuzhiyun 	.table = {
245*4882a593Smuzhiyun 		GPIO_LOOKUP("GPB", 2, NULL, GPIO_ACTIVE_HIGH),
246*4882a593Smuzhiyun 		{ },
247*4882a593Smuzhiyun 	},
248*4882a593Smuzhiyun };
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun static struct s3c24xx_led_platdata vr1000_led1_pdata = {
251*4882a593Smuzhiyun 	.name		= "led1",
252*4882a593Smuzhiyun 	.def_trigger	= "",
253*4882a593Smuzhiyun };
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun static struct s3c24xx_led_platdata vr1000_led2_pdata = {
256*4882a593Smuzhiyun 	.name		= "led2",
257*4882a593Smuzhiyun 	.def_trigger	= "",
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun static struct s3c24xx_led_platdata vr1000_led3_pdata = {
261*4882a593Smuzhiyun 	.name		= "led3",
262*4882a593Smuzhiyun 	.def_trigger	= "",
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun static struct platform_device vr1000_led1 = {
266*4882a593Smuzhiyun 	.name		= "s3c24xx_led",
267*4882a593Smuzhiyun 	.id		= 1,
268*4882a593Smuzhiyun 	.dev		= {
269*4882a593Smuzhiyun 		.platform_data	= &vr1000_led1_pdata,
270*4882a593Smuzhiyun 	},
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun 
273*4882a593Smuzhiyun static struct platform_device vr1000_led2 = {
274*4882a593Smuzhiyun 	.name		= "s3c24xx_led",
275*4882a593Smuzhiyun 	.id		= 2,
276*4882a593Smuzhiyun 	.dev		= {
277*4882a593Smuzhiyun 		.platform_data	= &vr1000_led2_pdata,
278*4882a593Smuzhiyun 	},
279*4882a593Smuzhiyun };
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun static struct platform_device vr1000_led3 = {
282*4882a593Smuzhiyun 	.name		= "s3c24xx_led",
283*4882a593Smuzhiyun 	.id		= 3,
284*4882a593Smuzhiyun 	.dev		= {
285*4882a593Smuzhiyun 		.platform_data	= &vr1000_led3_pdata,
286*4882a593Smuzhiyun 	},
287*4882a593Smuzhiyun };
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun /* I2C devices. */
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
292*4882a593Smuzhiyun 	{
293*4882a593Smuzhiyun 		I2C_BOARD_INFO("tlv320aic23", 0x1a),
294*4882a593Smuzhiyun 	}, {
295*4882a593Smuzhiyun 		I2C_BOARD_INFO("tmp101", 0x48),
296*4882a593Smuzhiyun 	}, {
297*4882a593Smuzhiyun 		I2C_BOARD_INFO("m41st87", 0x68),
298*4882a593Smuzhiyun 	},
299*4882a593Smuzhiyun };
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun /* devices for this board */
302*4882a593Smuzhiyun 
303*4882a593Smuzhiyun static struct platform_device *vr1000_devices[] __initdata = {
304*4882a593Smuzhiyun 	&s3c2410_device_dclk,
305*4882a593Smuzhiyun 	&s3c_device_ohci,
306*4882a593Smuzhiyun 	&s3c_device_lcd,
307*4882a593Smuzhiyun 	&s3c_device_wdt,
308*4882a593Smuzhiyun 	&s3c_device_i2c0,
309*4882a593Smuzhiyun 	&s3c_device_adc,
310*4882a593Smuzhiyun 	&serial_device,
311*4882a593Smuzhiyun 	&vr1000_dm9k0,
312*4882a593Smuzhiyun 	&vr1000_dm9k1,
313*4882a593Smuzhiyun 	&vr1000_led1,
314*4882a593Smuzhiyun 	&vr1000_led2,
315*4882a593Smuzhiyun 	&vr1000_led3,
316*4882a593Smuzhiyun };
317*4882a593Smuzhiyun 
vr1000_power_off(void)318*4882a593Smuzhiyun static void vr1000_power_off(void)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun 	gpio_direction_output(S3C2410_GPB(9), 1);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun 
vr1000_map_io(void)323*4882a593Smuzhiyun static void __init vr1000_map_io(void)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun 	pm_power_off = vr1000_power_off;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
328*4882a593Smuzhiyun 	s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
329*4882a593Smuzhiyun 	s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
vr1000_init_time(void)332*4882a593Smuzhiyun static void __init vr1000_init_time(void)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 	s3c2410_init_clocks(12000000);
335*4882a593Smuzhiyun 	s3c24xx_timer_init();
336*4882a593Smuzhiyun }
337*4882a593Smuzhiyun 
vr1000_init(void)338*4882a593Smuzhiyun static void __init vr1000_init(void)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun 	s3c_i2c0_set_platdata(NULL);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	/* Disable pull-up on LED lines and register GPIO lookups */
343*4882a593Smuzhiyun 	s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE);
344*4882a593Smuzhiyun 	s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_NONE);
345*4882a593Smuzhiyun 	s3c_gpio_setpull(S3C2410_GPB(2), S3C_GPIO_PULL_NONE);
346*4882a593Smuzhiyun 	gpiod_add_lookup_table(&vr1000_led1_gpio_table);
347*4882a593Smuzhiyun 	gpiod_add_lookup_table(&vr1000_led2_gpio_table);
348*4882a593Smuzhiyun 	gpiod_add_lookup_table(&vr1000_led3_gpio_table);
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun 	i2c_register_board_info(0, vr1000_i2c_devs,
353*4882a593Smuzhiyun 				ARRAY_SIZE(vr1000_i2c_devs));
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	nor_simtec_init();
356*4882a593Smuzhiyun 	simtec_audio_add(NULL, true, NULL);
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	WARN_ON(gpio_request(S3C2410_GPB(9), "power off"));
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun MACHINE_START(VR1000, "Thorcom-VR1000")
362*4882a593Smuzhiyun 	/* Maintainer: Ben Dooks <ben@simtec.co.uk> */
363*4882a593Smuzhiyun 	.atag_offset	= 0x100,
364*4882a593Smuzhiyun 	.map_io		= vr1000_map_io,
365*4882a593Smuzhiyun 	.init_machine	= vr1000_init,
366*4882a593Smuzhiyun 	.init_irq	= s3c2410_init_irq,
367*4882a593Smuzhiyun 	.init_time	= vr1000_init_time,
368*4882a593Smuzhiyun MACHINE_END
369