1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright 2008 Openmoko, Inc.
4*4882a593Smuzhiyun // Copyright 2008 Simtec Electronics
5*4882a593Smuzhiyun // Ben Dooks <ben@simtec.co.uk>
6*4882a593Smuzhiyun // http://armlinux.simtec.co.uk/
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/types.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/list.h>
12*4882a593Smuzhiyun #include <linux/timer.h>
13*4882a593Smuzhiyun #include <linux/init.h>
14*4882a593Smuzhiyun #include <linux/input.h>
15*4882a593Smuzhiyun #include <linux/serial_core.h>
16*4882a593Smuzhiyun #include <linux/serial_s3c.h>
17*4882a593Smuzhiyun #include <linux/platform_device.h>
18*4882a593Smuzhiyun #include <linux/io.h>
19*4882a593Smuzhiyun #include <linux/i2c.h>
20*4882a593Smuzhiyun #include <linux/leds.h>
21*4882a593Smuzhiyun #include <linux/fb.h>
22*4882a593Smuzhiyun #include <linux/gpio.h>
23*4882a593Smuzhiyun #include <linux/delay.h>
24*4882a593Smuzhiyun #include <linux/smsc911x.h>
25*4882a593Smuzhiyun #include <linux/regulator/fixed.h>
26*4882a593Smuzhiyun #include <linux/regulator/machine.h>
27*4882a593Smuzhiyun #include <linux/pwm.h>
28*4882a593Smuzhiyun #include <linux/pwm_backlight.h>
29*4882a593Smuzhiyun #include <linux/platform_data/s3c-hsotg.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_WM1190_EV1
32*4882a593Smuzhiyun #include <linux/mfd/wm8350/core.h>
33*4882a593Smuzhiyun #include <linux/mfd/wm8350/pmic.h>
34*4882a593Smuzhiyun #endif
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_WM1192_EV1
37*4882a593Smuzhiyun #include <linux/mfd/wm831x/core.h>
38*4882a593Smuzhiyun #include <linux/mfd/wm831x/pdata.h>
39*4882a593Smuzhiyun #endif
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #include <video/platform_lcd.h>
42*4882a593Smuzhiyun #include <video/samsung_fimd.h>
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #include <asm/mach/arch.h>
45*4882a593Smuzhiyun #include <asm/mach/map.h>
46*4882a593Smuzhiyun #include <asm/mach/irq.h>
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #include <mach/irqs.h>
49*4882a593Smuzhiyun #include "map.h"
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #include <asm/irq.h>
52*4882a593Smuzhiyun #include <asm/mach-types.h>
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun #include "regs-gpio.h"
55*4882a593Smuzhiyun #include "gpio-samsung.h"
56*4882a593Smuzhiyun #include <linux/platform_data/ata-samsung_cf.h>
57*4882a593Smuzhiyun #include <linux/platform_data/i2c-s3c2410.h>
58*4882a593Smuzhiyun #include "fb.h"
59*4882a593Smuzhiyun #include "gpio-cfg.h"
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #include "devs.h"
62*4882a593Smuzhiyun #include "cpu.h"
63*4882a593Smuzhiyun #include <linux/soc/samsung/s3c-adc.h>
64*4882a593Smuzhiyun #include <linux/platform_data/touchscreen-s3c2410.h>
65*4882a593Smuzhiyun #include "keypad.h"
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun #include "backlight-s3c64xx.h"
68*4882a593Smuzhiyun #include "s3c64xx.h"
69*4882a593Smuzhiyun #include "regs-modem-s3c64xx.h"
70*4882a593Smuzhiyun #include "regs-srom-s3c64xx.h"
71*4882a593Smuzhiyun #include "regs-sys-s3c64xx.h"
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
74*4882a593Smuzhiyun #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
75*4882a593Smuzhiyun #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
78*4882a593Smuzhiyun [0] = {
79*4882a593Smuzhiyun .hwport = 0,
80*4882a593Smuzhiyun .flags = 0,
81*4882a593Smuzhiyun .ucon = UCON,
82*4882a593Smuzhiyun .ulcon = ULCON,
83*4882a593Smuzhiyun .ufcon = UFCON,
84*4882a593Smuzhiyun },
85*4882a593Smuzhiyun [1] = {
86*4882a593Smuzhiyun .hwport = 1,
87*4882a593Smuzhiyun .flags = 0,
88*4882a593Smuzhiyun .ucon = UCON,
89*4882a593Smuzhiyun .ulcon = ULCON,
90*4882a593Smuzhiyun .ufcon = UFCON,
91*4882a593Smuzhiyun },
92*4882a593Smuzhiyun [2] = {
93*4882a593Smuzhiyun .hwport = 2,
94*4882a593Smuzhiyun .flags = 0,
95*4882a593Smuzhiyun .ucon = UCON,
96*4882a593Smuzhiyun .ulcon = ULCON,
97*4882a593Smuzhiyun .ufcon = UFCON,
98*4882a593Smuzhiyun },
99*4882a593Smuzhiyun [3] = {
100*4882a593Smuzhiyun .hwport = 3,
101*4882a593Smuzhiyun .flags = 0,
102*4882a593Smuzhiyun .ucon = UCON,
103*4882a593Smuzhiyun .ulcon = ULCON,
104*4882a593Smuzhiyun .ufcon = UFCON,
105*4882a593Smuzhiyun },
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* framebuffer and LCD setup. */
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /* GPF15 = LCD backlight control
111*4882a593Smuzhiyun * GPF13 => Panel power
112*4882a593Smuzhiyun * GPN5 = LCD nRESET signal
113*4882a593Smuzhiyun * PWM_TOUT1 => backlight brightness
114*4882a593Smuzhiyun */
115*4882a593Smuzhiyun
smdk6410_lcd_power_set(struct plat_lcd_data * pd,unsigned int power)116*4882a593Smuzhiyun static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
117*4882a593Smuzhiyun unsigned int power)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun if (power) {
120*4882a593Smuzhiyun gpio_direction_output(S3C64XX_GPF(13), 1);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /* fire nRESET on power up */
123*4882a593Smuzhiyun gpio_direction_output(S3C64XX_GPN(5), 0);
124*4882a593Smuzhiyun msleep(10);
125*4882a593Smuzhiyun gpio_direction_output(S3C64XX_GPN(5), 1);
126*4882a593Smuzhiyun msleep(1);
127*4882a593Smuzhiyun } else {
128*4882a593Smuzhiyun gpio_direction_output(S3C64XX_GPF(13), 0);
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun static struct plat_lcd_data smdk6410_lcd_power_data = {
133*4882a593Smuzhiyun .set_power = smdk6410_lcd_power_set,
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static struct platform_device smdk6410_lcd_powerdev = {
137*4882a593Smuzhiyun .name = "platform-lcd",
138*4882a593Smuzhiyun .dev.parent = &s3c_device_fb.dev,
139*4882a593Smuzhiyun .dev.platform_data = &smdk6410_lcd_power_data,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun static struct s3c_fb_pd_win smdk6410_fb_win0 = {
143*4882a593Smuzhiyun .max_bpp = 32,
144*4882a593Smuzhiyun .default_bpp = 16,
145*4882a593Smuzhiyun .xres = 800,
146*4882a593Smuzhiyun .yres = 480,
147*4882a593Smuzhiyun .virtual_y = 480 * 2,
148*4882a593Smuzhiyun .virtual_x = 800,
149*4882a593Smuzhiyun };
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun static struct fb_videomode smdk6410_lcd_timing = {
152*4882a593Smuzhiyun .left_margin = 8,
153*4882a593Smuzhiyun .right_margin = 13,
154*4882a593Smuzhiyun .upper_margin = 7,
155*4882a593Smuzhiyun .lower_margin = 5,
156*4882a593Smuzhiyun .hsync_len = 3,
157*4882a593Smuzhiyun .vsync_len = 1,
158*4882a593Smuzhiyun .xres = 800,
159*4882a593Smuzhiyun .yres = 480,
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
163*4882a593Smuzhiyun static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
164*4882a593Smuzhiyun .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
165*4882a593Smuzhiyun .vtiming = &smdk6410_lcd_timing,
166*4882a593Smuzhiyun .win[0] = &smdk6410_fb_win0,
167*4882a593Smuzhiyun .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
168*4882a593Smuzhiyun .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
169*4882a593Smuzhiyun };
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun /*
172*4882a593Smuzhiyun * Configuring Ethernet on SMDK6410
173*4882a593Smuzhiyun *
174*4882a593Smuzhiyun * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
175*4882a593Smuzhiyun * The constant address below corresponds to nCS1
176*4882a593Smuzhiyun *
177*4882a593Smuzhiyun * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
178*4882a593Smuzhiyun * 2) CFG6 needs to be switched to "LAN9115" side
179*4882a593Smuzhiyun */
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun static struct resource smdk6410_smsc911x_resources[] = {
182*4882a593Smuzhiyun [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
183*4882a593Smuzhiyun [1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
184*4882a593Smuzhiyun | IRQ_TYPE_LEVEL_LOW),
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
188*4882a593Smuzhiyun .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
189*4882a593Smuzhiyun .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
190*4882a593Smuzhiyun .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
191*4882a593Smuzhiyun .phy_interface = PHY_INTERFACE_MODE_MII,
192*4882a593Smuzhiyun };
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun static struct platform_device smdk6410_smsc911x = {
196*4882a593Smuzhiyun .name = "smsc911x",
197*4882a593Smuzhiyun .id = -1,
198*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
199*4882a593Smuzhiyun .resource = &smdk6410_smsc911x_resources[0],
200*4882a593Smuzhiyun .dev = {
201*4882a593Smuzhiyun .platform_data = &smdk6410_smsc911x_pdata,
202*4882a593Smuzhiyun },
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun #ifdef CONFIG_REGULATOR
206*4882a593Smuzhiyun static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
207*4882a593Smuzhiyun REGULATOR_SUPPLY("PVDD", "0-001b"),
208*4882a593Smuzhiyun REGULATOR_SUPPLY("AVDD", "0-001b"),
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_b_pwr_5v_data = {
212*4882a593Smuzhiyun .constraints = {
213*4882a593Smuzhiyun .always_on = 1,
214*4882a593Smuzhiyun },
215*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
216*4882a593Smuzhiyun .consumer_supplies = smdk6410_b_pwr_5v_consumers,
217*4882a593Smuzhiyun };
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
220*4882a593Smuzhiyun .supply_name = "B_PWR_5V",
221*4882a593Smuzhiyun .microvolts = 5000000,
222*4882a593Smuzhiyun .init_data = &smdk6410_b_pwr_5v_data,
223*4882a593Smuzhiyun };
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun static struct platform_device smdk6410_b_pwr_5v = {
226*4882a593Smuzhiyun .name = "reg-fixed-voltage",
227*4882a593Smuzhiyun .id = -1,
228*4882a593Smuzhiyun .dev = {
229*4882a593Smuzhiyun .platform_data = &smdk6410_b_pwr_5v_pdata,
230*4882a593Smuzhiyun },
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun #endif
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
235*4882a593Smuzhiyun .setup_gpio = s3c64xx_ide_setup_gpio,
236*4882a593Smuzhiyun };
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun static uint32_t smdk6410_keymap[] __initdata = {
239*4882a593Smuzhiyun /* KEY(row, col, keycode) */
240*4882a593Smuzhiyun KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
241*4882a593Smuzhiyun KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
242*4882a593Smuzhiyun KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
243*4882a593Smuzhiyun KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
244*4882a593Smuzhiyun };
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
247*4882a593Smuzhiyun .keymap = smdk6410_keymap,
248*4882a593Smuzhiyun .keymap_size = ARRAY_SIZE(smdk6410_keymap),
249*4882a593Smuzhiyun };
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
252*4882a593Smuzhiyun .keymap_data = &smdk6410_keymap_data,
253*4882a593Smuzhiyun .rows = 2,
254*4882a593Smuzhiyun .cols = 8,
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun static struct map_desc smdk6410_iodesc[] = {};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun static struct platform_device *smdk6410_devices[] __initdata = {
260*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_SD_CH0
261*4882a593Smuzhiyun &s3c_device_hsmmc0,
262*4882a593Smuzhiyun #endif
263*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_SD_CH1
264*4882a593Smuzhiyun &s3c_device_hsmmc1,
265*4882a593Smuzhiyun #endif
266*4882a593Smuzhiyun &s3c_device_i2c0,
267*4882a593Smuzhiyun &s3c_device_i2c1,
268*4882a593Smuzhiyun &s3c_device_fb,
269*4882a593Smuzhiyun &s3c_device_ohci,
270*4882a593Smuzhiyun &samsung_device_pwm,
271*4882a593Smuzhiyun &s3c_device_usb_hsotg,
272*4882a593Smuzhiyun &s3c64xx_device_iisv4,
273*4882a593Smuzhiyun &samsung_device_keypad,
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun #ifdef CONFIG_REGULATOR
276*4882a593Smuzhiyun &smdk6410_b_pwr_5v,
277*4882a593Smuzhiyun #endif
278*4882a593Smuzhiyun &smdk6410_lcd_powerdev,
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun &smdk6410_smsc911x,
281*4882a593Smuzhiyun &s3c_device_adc,
282*4882a593Smuzhiyun &s3c_device_cfcon,
283*4882a593Smuzhiyun &s3c_device_rtc,
284*4882a593Smuzhiyun &s3c_device_wdt,
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun #ifdef CONFIG_REGULATOR
288*4882a593Smuzhiyun /* ARM core */
289*4882a593Smuzhiyun static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
290*4882a593Smuzhiyun REGULATOR_SUPPLY("vddarm", NULL),
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /* VDDARM, BUCK1 on J5 */
294*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddarm = {
295*4882a593Smuzhiyun .constraints = {
296*4882a593Smuzhiyun .name = "PVDD_ARM",
297*4882a593Smuzhiyun .min_uV = 1000000,
298*4882a593Smuzhiyun .max_uV = 1300000,
299*4882a593Smuzhiyun .always_on = 1,
300*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
301*4882a593Smuzhiyun },
302*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
303*4882a593Smuzhiyun .consumer_supplies = smdk6410_vddarm_consumers,
304*4882a593Smuzhiyun };
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /* VDD_INT, BUCK2 on J5 */
307*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddint = {
308*4882a593Smuzhiyun .constraints = {
309*4882a593Smuzhiyun .name = "PVDD_INT",
310*4882a593Smuzhiyun .min_uV = 1000000,
311*4882a593Smuzhiyun .max_uV = 1200000,
312*4882a593Smuzhiyun .always_on = 1,
313*4882a593Smuzhiyun .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
314*4882a593Smuzhiyun },
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /* VDD_HI, LDO3 on J5 */
318*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddhi = {
319*4882a593Smuzhiyun .constraints = {
320*4882a593Smuzhiyun .name = "PVDD_HI",
321*4882a593Smuzhiyun .always_on = 1,
322*4882a593Smuzhiyun },
323*4882a593Smuzhiyun };
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun /* VDD_PLL, LDO2 on J5 */
326*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddpll = {
327*4882a593Smuzhiyun .constraints = {
328*4882a593Smuzhiyun .name = "PVDD_PLL",
329*4882a593Smuzhiyun .always_on = 1,
330*4882a593Smuzhiyun },
331*4882a593Smuzhiyun };
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun /* VDD_UH_MMC, LDO5 on J5 */
334*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vdduh_mmc = {
335*4882a593Smuzhiyun .constraints = {
336*4882a593Smuzhiyun .name = "PVDD_UH+PVDD_MMC",
337*4882a593Smuzhiyun .always_on = 1,
338*4882a593Smuzhiyun },
339*4882a593Smuzhiyun };
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun /* VCCM3BT, LDO8 on J5 */
342*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vccmc3bt = {
343*4882a593Smuzhiyun .constraints = {
344*4882a593Smuzhiyun .name = "PVCCM3BT",
345*4882a593Smuzhiyun .always_on = 1,
346*4882a593Smuzhiyun },
347*4882a593Smuzhiyun };
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun /* VCCM2MTV, LDO11 on J5 */
350*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vccm2mtv = {
351*4882a593Smuzhiyun .constraints = {
352*4882a593Smuzhiyun .name = "PVCCM2MTV",
353*4882a593Smuzhiyun .always_on = 1,
354*4882a593Smuzhiyun },
355*4882a593Smuzhiyun };
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun /* VDD_LCD, LDO12 on J5 */
358*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddlcd = {
359*4882a593Smuzhiyun .constraints = {
360*4882a593Smuzhiyun .name = "PVDD_LCD",
361*4882a593Smuzhiyun .always_on = 1,
362*4882a593Smuzhiyun },
363*4882a593Smuzhiyun };
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun /* VDD_OTGI, LDO9 on J5 */
366*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddotgi = {
367*4882a593Smuzhiyun .constraints = {
368*4882a593Smuzhiyun .name = "PVDD_OTGI",
369*4882a593Smuzhiyun .always_on = 1,
370*4882a593Smuzhiyun },
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /* VDD_OTG, LDO14 on J5 */
374*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddotg = {
375*4882a593Smuzhiyun .constraints = {
376*4882a593Smuzhiyun .name = "PVDD_OTG",
377*4882a593Smuzhiyun .always_on = 1,
378*4882a593Smuzhiyun },
379*4882a593Smuzhiyun };
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun /* VDD_ALIVE, LDO15 on J5 */
382*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddalive = {
383*4882a593Smuzhiyun .constraints = {
384*4882a593Smuzhiyun .name = "PVDD_ALIVE",
385*4882a593Smuzhiyun .always_on = 1,
386*4882a593Smuzhiyun },
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /* VDD_AUDIO, VLDO_AUDIO on J5 */
390*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused smdk6410_vddaudio = {
391*4882a593Smuzhiyun .constraints = {
392*4882a593Smuzhiyun .name = "PVDD_AUDIO",
393*4882a593Smuzhiyun .always_on = 1,
394*4882a593Smuzhiyun },
395*4882a593Smuzhiyun };
396*4882a593Smuzhiyun #endif
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_WM1190_EV1
399*4882a593Smuzhiyun /* S3C64xx internal logic & PLL */
400*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused wm8350_dcdc1_data = {
401*4882a593Smuzhiyun .constraints = {
402*4882a593Smuzhiyun .name = "PVDD_INT+PVDD_PLL",
403*4882a593Smuzhiyun .min_uV = 1200000,
404*4882a593Smuzhiyun .max_uV = 1200000,
405*4882a593Smuzhiyun .always_on = 1,
406*4882a593Smuzhiyun .apply_uV = 1,
407*4882a593Smuzhiyun },
408*4882a593Smuzhiyun };
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun /* Memory */
411*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused wm8350_dcdc3_data = {
412*4882a593Smuzhiyun .constraints = {
413*4882a593Smuzhiyun .name = "PVDD_MEM",
414*4882a593Smuzhiyun .min_uV = 1800000,
415*4882a593Smuzhiyun .max_uV = 1800000,
416*4882a593Smuzhiyun .always_on = 1,
417*4882a593Smuzhiyun .state_mem = {
418*4882a593Smuzhiyun .uV = 1800000,
419*4882a593Smuzhiyun .mode = REGULATOR_MODE_NORMAL,
420*4882a593Smuzhiyun .enabled = 1,
421*4882a593Smuzhiyun },
422*4882a593Smuzhiyun .initial_state = PM_SUSPEND_MEM,
423*4882a593Smuzhiyun },
424*4882a593Smuzhiyun };
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun /* USB, EXT, PCM, ADC/DAC, USB, MMC */
427*4882a593Smuzhiyun static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
428*4882a593Smuzhiyun REGULATOR_SUPPLY("DVDD", "0-001b"),
429*4882a593Smuzhiyun };
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused wm8350_dcdc4_data = {
432*4882a593Smuzhiyun .constraints = {
433*4882a593Smuzhiyun .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
434*4882a593Smuzhiyun .min_uV = 3000000,
435*4882a593Smuzhiyun .max_uV = 3000000,
436*4882a593Smuzhiyun .always_on = 1,
437*4882a593Smuzhiyun },
438*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
439*4882a593Smuzhiyun .consumer_supplies = wm8350_dcdc4_consumers,
440*4882a593Smuzhiyun };
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun /* OTGi/1190-EV1 HPVDD & AVDD */
443*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused wm8350_ldo4_data = {
444*4882a593Smuzhiyun .constraints = {
445*4882a593Smuzhiyun .name = "PVDD_OTGI+HPVDD+AVDD",
446*4882a593Smuzhiyun .min_uV = 1200000,
447*4882a593Smuzhiyun .max_uV = 1200000,
448*4882a593Smuzhiyun .apply_uV = 1,
449*4882a593Smuzhiyun .always_on = 1,
450*4882a593Smuzhiyun },
451*4882a593Smuzhiyun };
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun static struct {
454*4882a593Smuzhiyun int regulator;
455*4882a593Smuzhiyun struct regulator_init_data *initdata;
456*4882a593Smuzhiyun } wm1190_regulators[] = {
457*4882a593Smuzhiyun { WM8350_DCDC_1, &wm8350_dcdc1_data },
458*4882a593Smuzhiyun { WM8350_DCDC_3, &wm8350_dcdc3_data },
459*4882a593Smuzhiyun { WM8350_DCDC_4, &wm8350_dcdc4_data },
460*4882a593Smuzhiyun { WM8350_DCDC_6, &smdk6410_vddarm },
461*4882a593Smuzhiyun { WM8350_LDO_1, &smdk6410_vddalive },
462*4882a593Smuzhiyun { WM8350_LDO_2, &smdk6410_vddotg },
463*4882a593Smuzhiyun { WM8350_LDO_3, &smdk6410_vddlcd },
464*4882a593Smuzhiyun { WM8350_LDO_4, &wm8350_ldo4_data },
465*4882a593Smuzhiyun };
466*4882a593Smuzhiyun
smdk6410_wm8350_init(struct wm8350 * wm8350)467*4882a593Smuzhiyun static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun int i;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun /* Configure the IRQ line */
472*4882a593Smuzhiyun s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
473*4882a593Smuzhiyun
474*4882a593Smuzhiyun /* Instantiate the regulators */
475*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
476*4882a593Smuzhiyun wm8350_register_regulator(wm8350,
477*4882a593Smuzhiyun wm1190_regulators[i].regulator,
478*4882a593Smuzhiyun wm1190_regulators[i].initdata);
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun return 0;
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
484*4882a593Smuzhiyun .init = smdk6410_wm8350_init,
485*4882a593Smuzhiyun .irq_high = 1,
486*4882a593Smuzhiyun .irq_base = IRQ_BOARD_START,
487*4882a593Smuzhiyun };
488*4882a593Smuzhiyun #endif
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_WM1192_EV1
491*4882a593Smuzhiyun static struct gpio_led wm1192_pmic_leds[] = {
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun .name = "PMIC:red:power",
494*4882a593Smuzhiyun .gpio = GPIO_BOARD_START + 3,
495*4882a593Smuzhiyun .default_state = LEDS_GPIO_DEFSTATE_ON,
496*4882a593Smuzhiyun },
497*4882a593Smuzhiyun };
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun static struct gpio_led_platform_data wm1192_pmic_led = {
500*4882a593Smuzhiyun .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
501*4882a593Smuzhiyun .leds = wm1192_pmic_leds,
502*4882a593Smuzhiyun };
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun static struct platform_device wm1192_pmic_led_dev = {
505*4882a593Smuzhiyun .name = "leds-gpio",
506*4882a593Smuzhiyun .id = -1,
507*4882a593Smuzhiyun .dev = {
508*4882a593Smuzhiyun .platform_data = &wm1192_pmic_led,
509*4882a593Smuzhiyun },
510*4882a593Smuzhiyun };
511*4882a593Smuzhiyun
wm1192_pre_init(struct wm831x * wm831x)512*4882a593Smuzhiyun static int wm1192_pre_init(struct wm831x *wm831x)
513*4882a593Smuzhiyun {
514*4882a593Smuzhiyun int ret;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun /* Configure the IRQ line */
517*4882a593Smuzhiyun s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun ret = platform_device_register(&wm1192_pmic_led_dev);
520*4882a593Smuzhiyun if (ret != 0)
521*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun return 0;
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
527*4882a593Smuzhiyun .isink = 1,
528*4882a593Smuzhiyun .max_uA = 27554,
529*4882a593Smuzhiyun };
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused wm1192_dcdc3 = {
532*4882a593Smuzhiyun .constraints = {
533*4882a593Smuzhiyun .name = "PVDD_MEM+PVDD_GPS",
534*4882a593Smuzhiyun .always_on = 1,
535*4882a593Smuzhiyun },
536*4882a593Smuzhiyun };
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
539*4882a593Smuzhiyun REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
540*4882a593Smuzhiyun };
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun static struct regulator_init_data __maybe_unused wm1192_ldo1 = {
543*4882a593Smuzhiyun .constraints = {
544*4882a593Smuzhiyun .name = "PVDD_LCD+PVDD_EXT",
545*4882a593Smuzhiyun .always_on = 1,
546*4882a593Smuzhiyun },
547*4882a593Smuzhiyun .consumer_supplies = wm1192_ldo1_consumers,
548*4882a593Smuzhiyun .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
549*4882a593Smuzhiyun };
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun static struct wm831x_status_pdata wm1192_led7_pdata = {
552*4882a593Smuzhiyun .name = "LED7:green:",
553*4882a593Smuzhiyun };
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun static struct wm831x_status_pdata wm1192_led8_pdata = {
556*4882a593Smuzhiyun .name = "LED8:green:",
557*4882a593Smuzhiyun };
558*4882a593Smuzhiyun
559*4882a593Smuzhiyun static struct wm831x_pdata smdk6410_wm1192_pdata = {
560*4882a593Smuzhiyun .pre_init = wm1192_pre_init,
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun .backlight = &wm1192_backlight_pdata,
563*4882a593Smuzhiyun .dcdc = {
564*4882a593Smuzhiyun &smdk6410_vddarm, /* DCDC1 */
565*4882a593Smuzhiyun &smdk6410_vddint, /* DCDC2 */
566*4882a593Smuzhiyun &wm1192_dcdc3,
567*4882a593Smuzhiyun },
568*4882a593Smuzhiyun .gpio_base = GPIO_BOARD_START,
569*4882a593Smuzhiyun .ldo = {
570*4882a593Smuzhiyun &wm1192_ldo1, /* LDO1 */
571*4882a593Smuzhiyun &smdk6410_vdduh_mmc, /* LDO2 */
572*4882a593Smuzhiyun NULL, /* LDO3 NC */
573*4882a593Smuzhiyun &smdk6410_vddotgi, /* LDO4 */
574*4882a593Smuzhiyun &smdk6410_vddotg, /* LDO5 */
575*4882a593Smuzhiyun &smdk6410_vddhi, /* LDO6 */
576*4882a593Smuzhiyun &smdk6410_vddaudio, /* LDO7 */
577*4882a593Smuzhiyun &smdk6410_vccm2mtv, /* LDO8 */
578*4882a593Smuzhiyun &smdk6410_vddpll, /* LDO9 */
579*4882a593Smuzhiyun &smdk6410_vccmc3bt, /* LDO10 */
580*4882a593Smuzhiyun &smdk6410_vddalive, /* LDO11 */
581*4882a593Smuzhiyun },
582*4882a593Smuzhiyun .status = {
583*4882a593Smuzhiyun &wm1192_led7_pdata,
584*4882a593Smuzhiyun &wm1192_led8_pdata,
585*4882a593Smuzhiyun },
586*4882a593Smuzhiyun };
587*4882a593Smuzhiyun #endif
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun static struct i2c_board_info i2c_devs0[] __initdata = {
590*4882a593Smuzhiyun { I2C_BOARD_INFO("24c08", 0x50), },
591*4882a593Smuzhiyun { I2C_BOARD_INFO("wm8580", 0x1b), },
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_WM1192_EV1
594*4882a593Smuzhiyun { I2C_BOARD_INFO("wm8312", 0x34),
595*4882a593Smuzhiyun .platform_data = &smdk6410_wm1192_pdata,
596*4882a593Smuzhiyun .irq = S3C_EINT(12),
597*4882a593Smuzhiyun },
598*4882a593Smuzhiyun #endif
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun #ifdef CONFIG_SMDK6410_WM1190_EV1
601*4882a593Smuzhiyun { I2C_BOARD_INFO("wm8350", 0x1a),
602*4882a593Smuzhiyun .platform_data = &smdk6410_wm8350_pdata,
603*4882a593Smuzhiyun .irq = S3C_EINT(12),
604*4882a593Smuzhiyun },
605*4882a593Smuzhiyun #endif
606*4882a593Smuzhiyun };
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun static struct i2c_board_info i2c_devs1[] __initdata = {
609*4882a593Smuzhiyun { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
610*4882a593Smuzhiyun };
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun /* LCD Backlight data */
613*4882a593Smuzhiyun static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
614*4882a593Smuzhiyun .no = S3C64XX_GPF(15),
615*4882a593Smuzhiyun .func = S3C_GPIO_SFN(2),
616*4882a593Smuzhiyun };
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun static struct pwm_lookup smdk6410_pwm_lookup[] = {
619*4882a593Smuzhiyun PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", NULL, 78770,
620*4882a593Smuzhiyun PWM_POLARITY_NORMAL),
621*4882a593Smuzhiyun };
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun static struct platform_pwm_backlight_data smdk6410_bl_data = {
624*4882a593Smuzhiyun /* Intentionally blank */
625*4882a593Smuzhiyun };
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun static struct dwc2_hsotg_plat smdk6410_hsotg_pdata;
628*4882a593Smuzhiyun
smdk6410_map_io(void)629*4882a593Smuzhiyun static void __init smdk6410_map_io(void)
630*4882a593Smuzhiyun {
631*4882a593Smuzhiyun u32 tmp;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
634*4882a593Smuzhiyun s3c64xx_set_xtal_freq(12000000);
635*4882a593Smuzhiyun s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
636*4882a593Smuzhiyun s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun /* set the LCD type */
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun tmp = __raw_readl(S3C64XX_SPCON);
641*4882a593Smuzhiyun tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
642*4882a593Smuzhiyun tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
643*4882a593Smuzhiyun __raw_writel(tmp, S3C64XX_SPCON);
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun /* remove the lcd bypass */
646*4882a593Smuzhiyun tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
647*4882a593Smuzhiyun tmp &= ~MIFPCON_LCD_BYPASS;
648*4882a593Smuzhiyun __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun
smdk6410_machine_init(void)651*4882a593Smuzhiyun static void __init smdk6410_machine_init(void)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun u32 cs1;
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun s3c_i2c0_set_platdata(NULL);
656*4882a593Smuzhiyun s3c_i2c1_set_platdata(NULL);
657*4882a593Smuzhiyun s3c_fb_set_platdata(&smdk6410_lcd_pdata);
658*4882a593Smuzhiyun dwc2_hsotg_set_platdata(&smdk6410_hsotg_pdata);
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun samsung_keypad_set_platdata(&smdk6410_keypad_data);
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun s3c64xx_ts_set_platdata(NULL);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun /* configure nCS1 width to 16 bits */
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun cs1 = __raw_readl(S3C64XX_SROM_BW) &
667*4882a593Smuzhiyun ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
668*4882a593Smuzhiyun cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
669*4882a593Smuzhiyun (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
670*4882a593Smuzhiyun (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
671*4882a593Smuzhiyun S3C64XX_SROM_BW__NCS1__SHIFT;
672*4882a593Smuzhiyun __raw_writel(cs1, S3C64XX_SROM_BW);
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun /* set timing for nCS1 suitable for ethernet chip */
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
677*4882a593Smuzhiyun (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
678*4882a593Smuzhiyun (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
679*4882a593Smuzhiyun (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
680*4882a593Smuzhiyun (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
681*4882a593Smuzhiyun (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
682*4882a593Smuzhiyun (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
683*4882a593Smuzhiyun
684*4882a593Smuzhiyun gpio_request(S3C64XX_GPN(5), "LCD power");
685*4882a593Smuzhiyun gpio_request(S3C64XX_GPF(13), "LCD power");
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
688*4882a593Smuzhiyun i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun s3c_ide_set_platdata(&smdk6410_ide_pdata);
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun pwm_add_table(smdk6410_pwm_lookup, ARRAY_SIZE(smdk6410_pwm_lookup));
695*4882a593Smuzhiyun samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
696*4882a593Smuzhiyun }
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun MACHINE_START(SMDK6410, "SMDK6410")
699*4882a593Smuzhiyun /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
700*4882a593Smuzhiyun .atag_offset = 0x100,
701*4882a593Smuzhiyun .nr_irqs = S3C64XX_NR_IRQS,
702*4882a593Smuzhiyun .init_irq = s3c6410_init_irq,
703*4882a593Smuzhiyun .map_io = smdk6410_map_io,
704*4882a593Smuzhiyun .init_machine = smdk6410_machine_init,
705*4882a593Smuzhiyun .init_time = s3c64xx_timer_init,
706*4882a593Smuzhiyun MACHINE_END
707