xref: /OK3568_Linux_fs/kernel/arch/arm/mach-s3c/mach-smdk2440.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun // linux/arch/arm/mach-s3c2440/mach-smdk2440.c
3*4882a593Smuzhiyun //
4*4882a593Smuzhiyun // Copyright (c) 2004-2005 Simtec Electronics
5*4882a593Smuzhiyun //	Ben Dooks <ben@simtec.co.uk>
6*4882a593Smuzhiyun //
7*4882a593Smuzhiyun // http://www.fluff.org/ben/smdk2440/
8*4882a593Smuzhiyun //
9*4882a593Smuzhiyun // Thanks to Dimity Andric and TomTom for the loan of an SMDK2440.
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/types.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/list.h>
15*4882a593Smuzhiyun #include <linux/timer.h>
16*4882a593Smuzhiyun #include <linux/init.h>
17*4882a593Smuzhiyun #include <linux/serial_core.h>
18*4882a593Smuzhiyun #include <linux/serial_s3c.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <asm/mach/arch.h>
23*4882a593Smuzhiyun #include <asm/mach/map.h>
24*4882a593Smuzhiyun #include <asm/mach/irq.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #include <asm/irq.h>
27*4882a593Smuzhiyun #include <asm/mach-types.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include "regs-gpio.h"
30*4882a593Smuzhiyun #include "gpio-samsung.h"
31*4882a593Smuzhiyun #include "gpio-cfg.h"
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include <linux/platform_data/fb-s3c2410.h>
34*4882a593Smuzhiyun #include <linux/platform_data/i2c-s3c2410.h>
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #include "devs.h"
37*4882a593Smuzhiyun #include "cpu.h"
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #include "s3c24xx.h"
40*4882a593Smuzhiyun #include "common-smdk-s3c24xx.h"
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun static struct map_desc smdk2440_iodesc[] __initdata = {
43*4882a593Smuzhiyun 	/* ISA IO Space map (memory space selected by A24) */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	{
46*4882a593Smuzhiyun 		.virtual	= (u32)S3C24XX_VA_ISA_WORD,
47*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(S3C2410_CS2),
48*4882a593Smuzhiyun 		.length		= 0x10000,
49*4882a593Smuzhiyun 		.type		= MT_DEVICE,
50*4882a593Smuzhiyun 	}, {
51*4882a593Smuzhiyun 		.virtual	= (u32)S3C24XX_VA_ISA_WORD + 0x10000,
52*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(S3C2410_CS2 + (1<<24)),
53*4882a593Smuzhiyun 		.length		= SZ_4M,
54*4882a593Smuzhiyun 		.type		= MT_DEVICE,
55*4882a593Smuzhiyun 	}, {
56*4882a593Smuzhiyun 		.virtual	= (u32)S3C24XX_VA_ISA_BYTE,
57*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(S3C2410_CS2),
58*4882a593Smuzhiyun 		.length		= 0x10000,
59*4882a593Smuzhiyun 		.type		= MT_DEVICE,
60*4882a593Smuzhiyun 	}, {
61*4882a593Smuzhiyun 		.virtual	= (u32)S3C24XX_VA_ISA_BYTE + 0x10000,
62*4882a593Smuzhiyun 		.pfn		= __phys_to_pfn(S3C2410_CS2 + (1<<24)),
63*4882a593Smuzhiyun 		.length		= SZ_4M,
64*4882a593Smuzhiyun 		.type		= MT_DEVICE,
65*4882a593Smuzhiyun 	}
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
69*4882a593Smuzhiyun #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
70*4882a593Smuzhiyun #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun static struct s3c2410_uartcfg smdk2440_uartcfgs[] __initdata = {
73*4882a593Smuzhiyun 	[0] = {
74*4882a593Smuzhiyun 		.hwport	     = 0,
75*4882a593Smuzhiyun 		.flags	     = 0,
76*4882a593Smuzhiyun 		.ucon	     = 0x3c5,
77*4882a593Smuzhiyun 		.ulcon	     = 0x03,
78*4882a593Smuzhiyun 		.ufcon	     = 0x51,
79*4882a593Smuzhiyun 	},
80*4882a593Smuzhiyun 	[1] = {
81*4882a593Smuzhiyun 		.hwport	     = 1,
82*4882a593Smuzhiyun 		.flags	     = 0,
83*4882a593Smuzhiyun 		.ucon	     = 0x3c5,
84*4882a593Smuzhiyun 		.ulcon	     = 0x03,
85*4882a593Smuzhiyun 		.ufcon	     = 0x51,
86*4882a593Smuzhiyun 	},
87*4882a593Smuzhiyun 	/* IR port */
88*4882a593Smuzhiyun 	[2] = {
89*4882a593Smuzhiyun 		.hwport	     = 2,
90*4882a593Smuzhiyun 		.flags	     = 0,
91*4882a593Smuzhiyun 		.ucon	     = 0x3c5,
92*4882a593Smuzhiyun 		.ulcon	     = 0x43,
93*4882a593Smuzhiyun 		.ufcon	     = 0x51,
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun };
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /* LCD driver info */
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun static struct s3c2410fb_display smdk2440_lcd_cfg __initdata = {
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	.lcdcon5	= S3C2410_LCDCON5_FRM565 |
102*4882a593Smuzhiyun 			  S3C2410_LCDCON5_INVVLINE |
103*4882a593Smuzhiyun 			  S3C2410_LCDCON5_INVVFRAME |
104*4882a593Smuzhiyun 			  S3C2410_LCDCON5_PWREN |
105*4882a593Smuzhiyun 			  S3C2410_LCDCON5_HWSWP,
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	.type		= S3C2410_LCDCON1_TFT,
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun 	.width		= 240,
110*4882a593Smuzhiyun 	.height		= 320,
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun 	.pixclock	= 166667, /* HCLK 60 MHz, divisor 10 */
113*4882a593Smuzhiyun 	.xres		= 240,
114*4882a593Smuzhiyun 	.yres		= 320,
115*4882a593Smuzhiyun 	.bpp		= 16,
116*4882a593Smuzhiyun 	.left_margin	= 20,
117*4882a593Smuzhiyun 	.right_margin	= 8,
118*4882a593Smuzhiyun 	.hsync_len	= 4,
119*4882a593Smuzhiyun 	.upper_margin	= 8,
120*4882a593Smuzhiyun 	.lower_margin	= 7,
121*4882a593Smuzhiyun 	.vsync_len	= 4,
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = {
125*4882a593Smuzhiyun 	.displays	= &smdk2440_lcd_cfg,
126*4882a593Smuzhiyun 	.num_displays	= 1,
127*4882a593Smuzhiyun 	.default_display = 0,
128*4882a593Smuzhiyun 
129*4882a593Smuzhiyun #if 0
130*4882a593Smuzhiyun 	/* currently setup by downloader */
131*4882a593Smuzhiyun 	.gpccon		= 0xaa940659,
132*4882a593Smuzhiyun 	.gpccon_mask	= 0xffffffff,
133*4882a593Smuzhiyun 	.gpcup		= 0x0000ffff,
134*4882a593Smuzhiyun 	.gpcup_mask	= 0xffffffff,
135*4882a593Smuzhiyun 	.gpdcon		= 0xaa84aaa0,
136*4882a593Smuzhiyun 	.gpdcon_mask	= 0xffffffff,
137*4882a593Smuzhiyun 	.gpdup		= 0x0000faff,
138*4882a593Smuzhiyun 	.gpdup_mask	= 0xffffffff,
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	.gpccon_reg	= S3C2410_GPCCON,
141*4882a593Smuzhiyun 	.gpcup_reg	= S3C2410_GPCUP,
142*4882a593Smuzhiyun 	.gpdcon_reg	= S3C2410_GPDCON,
143*4882a593Smuzhiyun 	.gpdup_reg	= S3C2410_GPDUP,
144*4882a593Smuzhiyun #endif
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	.lpcsel		= ((0xCE6) & ~7) | 1<<4,
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static struct platform_device *smdk2440_devices[] __initdata = {
150*4882a593Smuzhiyun 	&s3c_device_ohci,
151*4882a593Smuzhiyun 	&s3c_device_lcd,
152*4882a593Smuzhiyun 	&s3c_device_wdt,
153*4882a593Smuzhiyun 	&s3c_device_i2c0,
154*4882a593Smuzhiyun 	&s3c_device_iis,
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun 
smdk2440_map_io(void)157*4882a593Smuzhiyun static void __init smdk2440_map_io(void)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc));
160*4882a593Smuzhiyun 	s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs));
161*4882a593Smuzhiyun 	s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
smdk2440_init_time(void)164*4882a593Smuzhiyun static void __init smdk2440_init_time(void)
165*4882a593Smuzhiyun {
166*4882a593Smuzhiyun 	s3c2440_init_clocks(16934400);
167*4882a593Smuzhiyun 	s3c24xx_timer_init();
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
smdk2440_machine_init(void)170*4882a593Smuzhiyun static void __init smdk2440_machine_init(void)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun 	s3c24xx_fb_set_platdata(&smdk2440_fb_info);
173*4882a593Smuzhiyun 	s3c_i2c0_set_platdata(NULL);
174*4882a593Smuzhiyun 	/* Configure the I2S pins (GPE0...GPE4) in correct mode */
175*4882a593Smuzhiyun 	s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
176*4882a593Smuzhiyun 			      S3C_GPIO_PULL_NONE);
177*4882a593Smuzhiyun 	platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices));
178*4882a593Smuzhiyun 	smdk_machine_init();
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun MACHINE_START(S3C2440, "SMDK2440")
182*4882a593Smuzhiyun 	/* Maintainer: Ben Dooks <ben-linux@fluff.org> */
183*4882a593Smuzhiyun 	.atag_offset	= 0x100,
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	.init_irq	= s3c2440_init_irq,
186*4882a593Smuzhiyun 	.map_io		= smdk2440_map_io,
187*4882a593Smuzhiyun 	.init_machine	= smdk2440_machine_init,
188*4882a593Smuzhiyun 	.init_time	= smdk2440_init_time,
189*4882a593Smuzhiyun MACHINE_END
190