1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (C) 2004 by FS Forth-Systeme GmbH
4*4882a593Smuzhiyun // All rights reserved.
5*4882a593Smuzhiyun //
6*4882a593Smuzhiyun // @Author: Jonas Dietsche
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun // @History:
9*4882a593Smuzhiyun // derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
10*4882a593Smuzhiyun // Ben Dooks <ben@simtec.co.uk>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/types.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/list.h>
16*4882a593Smuzhiyun #include <linux/timer.h>
17*4882a593Smuzhiyun #include <linux/init.h>
18*4882a593Smuzhiyun #include <linux/serial_core.h>
19*4882a593Smuzhiyun #include <linux/serial_s3c.h>
20*4882a593Smuzhiyun #include <linux/platform_device.h>
21*4882a593Smuzhiyun #include <linux/io.h>
22*4882a593Smuzhiyun #include "gpio-samsung.h"
23*4882a593Smuzhiyun #include "gpio-cfg.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <asm/mach/arch.h>
26*4882a593Smuzhiyun #include <asm/mach/map.h>
27*4882a593Smuzhiyun #include <asm/mach/irq.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #include <asm/irq.h>
30*4882a593Smuzhiyun #include <asm/mach-types.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include <linux/platform_data/i2c-s3c2410.h>
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #include "devs.h"
35*4882a593Smuzhiyun #include "cpu.h"
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #include "s3c24xx.h"
38*4882a593Smuzhiyun #include "common-smdk-s3c24xx.h"
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun static struct map_desc smdk2410_iodesc[] __initdata = {
41*4882a593Smuzhiyun /* nothing here yet */
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define UCON S3C2410_UCON_DEFAULT
45*4882a593Smuzhiyun #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
46*4882a593Smuzhiyun #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static struct s3c2410_uartcfg smdk2410_uartcfgs[] __initdata = {
49*4882a593Smuzhiyun [0] = {
50*4882a593Smuzhiyun .hwport = 0,
51*4882a593Smuzhiyun .flags = 0,
52*4882a593Smuzhiyun .ucon = UCON,
53*4882a593Smuzhiyun .ulcon = ULCON,
54*4882a593Smuzhiyun .ufcon = UFCON,
55*4882a593Smuzhiyun },
56*4882a593Smuzhiyun [1] = {
57*4882a593Smuzhiyun .hwport = 1,
58*4882a593Smuzhiyun .flags = 0,
59*4882a593Smuzhiyun .ucon = UCON,
60*4882a593Smuzhiyun .ulcon = ULCON,
61*4882a593Smuzhiyun .ufcon = UFCON,
62*4882a593Smuzhiyun },
63*4882a593Smuzhiyun [2] = {
64*4882a593Smuzhiyun .hwport = 2,
65*4882a593Smuzhiyun .flags = 0,
66*4882a593Smuzhiyun .ucon = UCON,
67*4882a593Smuzhiyun .ulcon = ULCON,
68*4882a593Smuzhiyun .ufcon = UFCON,
69*4882a593Smuzhiyun }
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun static struct platform_device *smdk2410_devices[] __initdata = {
73*4882a593Smuzhiyun &s3c_device_ohci,
74*4882a593Smuzhiyun &s3c_device_lcd,
75*4882a593Smuzhiyun &s3c_device_wdt,
76*4882a593Smuzhiyun &s3c_device_i2c0,
77*4882a593Smuzhiyun &s3c_device_iis,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun
smdk2410_map_io(void)80*4882a593Smuzhiyun static void __init smdk2410_map_io(void)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc));
83*4882a593Smuzhiyun s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs));
84*4882a593Smuzhiyun s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
smdk2410_init_time(void)87*4882a593Smuzhiyun static void __init smdk2410_init_time(void)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun s3c2410_init_clocks(12000000);
90*4882a593Smuzhiyun s3c24xx_timer_init();
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
smdk2410_init(void)93*4882a593Smuzhiyun static void __init smdk2410_init(void)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun s3c_i2c0_set_platdata(NULL);
96*4882a593Smuzhiyun platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices));
97*4882a593Smuzhiyun /* Configure the I2S pins (GPE0...GPE4) in correct mode */
98*4882a593Smuzhiyun s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
99*4882a593Smuzhiyun S3C_GPIO_PULL_NONE);
100*4882a593Smuzhiyun smdk_machine_init();
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun MACHINE_START(SMDK2410, "SMDK2410") /* @TODO: request a new identifier and switch
104*4882a593Smuzhiyun * to SMDK2410 */
105*4882a593Smuzhiyun /* Maintainer: Jonas Dietsche */
106*4882a593Smuzhiyun .atag_offset = 0x100,
107*4882a593Smuzhiyun .map_io = smdk2410_map_io,
108*4882a593Smuzhiyun .init_irq = s3c2410_init_irq,
109*4882a593Smuzhiyun .init_machine = smdk2410_init,
110*4882a593Smuzhiyun .init_time = smdk2410_init_time,
111*4882a593Smuzhiyun MACHINE_END
112