xref: /OK3568_Linux_fs/kernel/arch/arm/mach-s3c/mach-amlm5900.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (c) 2006 American Microsystems Limited
4*4882a593Smuzhiyun //	David Anders <danders@amltd.com>
5*4882a593Smuzhiyun //
6*4882a593Smuzhiyun // @History:
7*4882a593Smuzhiyun // derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by
8*4882a593Smuzhiyun // Ben Dooks <ben@simtec.co.uk>
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/types.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/list.h>
14*4882a593Smuzhiyun #include <linux/timer.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/gpio/machine.h>
17*4882a593Smuzhiyun #include <linux/gpio.h>
18*4882a593Smuzhiyun #include <linux/device.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/proc_fs.h>
21*4882a593Smuzhiyun #include <linux/serial_core.h>
22*4882a593Smuzhiyun #include <linux/serial_s3c.h>
23*4882a593Smuzhiyun #include <linux/io.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include <asm/mach/arch.h>
26*4882a593Smuzhiyun #include <asm/mach/map.h>
27*4882a593Smuzhiyun #include <asm/mach/irq.h>
28*4882a593Smuzhiyun #include <asm/mach/flash.h>
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #include <asm/irq.h>
31*4882a593Smuzhiyun #include <asm/mach-types.h>
32*4882a593Smuzhiyun #include <linux/platform_data/fb-s3c2410.h>
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #include "regs-gpio.h"
35*4882a593Smuzhiyun #include "gpio-samsung.h"
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #include <linux/platform_data/i2c-s3c2410.h>
38*4882a593Smuzhiyun #include "devs.h"
39*4882a593Smuzhiyun #include "cpu.h"
40*4882a593Smuzhiyun #include "gpio-cfg.h"
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
43*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
44*4882a593Smuzhiyun #include <linux/mtd/map.h>
45*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #include "s3c24xx.h"
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun static struct resource amlm5900_nor_resource =
50*4882a593Smuzhiyun 			DEFINE_RES_MEM(0x00000000, SZ_16M);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun static struct mtd_partition amlm5900_mtd_partitions[] = {
53*4882a593Smuzhiyun 	{
54*4882a593Smuzhiyun 		.name		= "System",
55*4882a593Smuzhiyun 		.size		= 0x240000,
56*4882a593Smuzhiyun 		.offset		= 0,
57*4882a593Smuzhiyun 		.mask_flags 	= MTD_WRITEABLE,  /* force read-only */
58*4882a593Smuzhiyun 	}, {
59*4882a593Smuzhiyun 		.name		= "Kernel",
60*4882a593Smuzhiyun 		.size		= 0x100000,
61*4882a593Smuzhiyun 		.offset		= MTDPART_OFS_APPEND,
62*4882a593Smuzhiyun 	}, {
63*4882a593Smuzhiyun 		.name		= "Ramdisk",
64*4882a593Smuzhiyun 		.size		= 0x300000,
65*4882a593Smuzhiyun 		.offset		= MTDPART_OFS_APPEND,
66*4882a593Smuzhiyun 	}, {
67*4882a593Smuzhiyun 		.name		= "JFFS2",
68*4882a593Smuzhiyun 		.size		= 0x9A0000,
69*4882a593Smuzhiyun 		.offset		= MTDPART_OFS_APPEND,
70*4882a593Smuzhiyun 	}, {
71*4882a593Smuzhiyun 		.name		= "Settings",
72*4882a593Smuzhiyun 		.size		= MTDPART_SIZ_FULL,
73*4882a593Smuzhiyun 		.offset		= MTDPART_OFS_APPEND,
74*4882a593Smuzhiyun 	}
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun static struct physmap_flash_data amlm5900_flash_data = {
78*4882a593Smuzhiyun 	.width		= 2,
79*4882a593Smuzhiyun 	.parts		= amlm5900_mtd_partitions,
80*4882a593Smuzhiyun 	.nr_parts	= ARRAY_SIZE(amlm5900_mtd_partitions),
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static struct platform_device amlm5900_device_nor = {
84*4882a593Smuzhiyun 	.name		= "physmap-flash",
85*4882a593Smuzhiyun 	.id		= 0,
86*4882a593Smuzhiyun 	.dev = {
87*4882a593Smuzhiyun 			.platform_data = &amlm5900_flash_data,
88*4882a593Smuzhiyun 		},
89*4882a593Smuzhiyun 	.num_resources	= 1,
90*4882a593Smuzhiyun 	.resource	= &amlm5900_nor_resource,
91*4882a593Smuzhiyun };
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun static struct map_desc amlm5900_iodesc[] __initdata = {
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #define UCON S3C2410_UCON_DEFAULT
97*4882a593Smuzhiyun #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
98*4882a593Smuzhiyun #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun static struct s3c2410_uartcfg amlm5900_uartcfgs[] = {
101*4882a593Smuzhiyun 	[0] = {
102*4882a593Smuzhiyun 		.hwport	     = 0,
103*4882a593Smuzhiyun 		.flags	     = 0,
104*4882a593Smuzhiyun 		.ucon	     = UCON,
105*4882a593Smuzhiyun 		.ulcon	     = ULCON,
106*4882a593Smuzhiyun 		.ufcon	     = UFCON,
107*4882a593Smuzhiyun 	},
108*4882a593Smuzhiyun 	[1] = {
109*4882a593Smuzhiyun 		.hwport	     = 1,
110*4882a593Smuzhiyun 		.flags	     = 0,
111*4882a593Smuzhiyun 		.ucon	     = UCON,
112*4882a593Smuzhiyun 		.ulcon	     = ULCON,
113*4882a593Smuzhiyun 		.ufcon	     = UFCON,
114*4882a593Smuzhiyun 	},
115*4882a593Smuzhiyun 	[2] = {
116*4882a593Smuzhiyun 		.hwport	     = 2,
117*4882a593Smuzhiyun 		.flags	     = 0,
118*4882a593Smuzhiyun 		.ucon	     = UCON,
119*4882a593Smuzhiyun 		.ulcon	     = ULCON,
120*4882a593Smuzhiyun 		.ufcon	     = UFCON,
121*4882a593Smuzhiyun 	}
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun static struct gpiod_lookup_table amlm5900_mmc_gpio_table = {
125*4882a593Smuzhiyun 	.dev_id = "s3c2410-sdi",
126*4882a593Smuzhiyun 	.table = {
127*4882a593Smuzhiyun 		/* bus pins */
128*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("GPIOE",  5, "bus", 0, GPIO_ACTIVE_HIGH),
129*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("GPIOE",  6, "bus", 1, GPIO_ACTIVE_HIGH),
130*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("GPIOE",  7, "bus", 2, GPIO_ACTIVE_HIGH),
131*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("GPIOE",  8, "bus", 3, GPIO_ACTIVE_HIGH),
132*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("GPIOE",  9, "bus", 4, GPIO_ACTIVE_HIGH),
133*4882a593Smuzhiyun 		GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH),
134*4882a593Smuzhiyun 		{ },
135*4882a593Smuzhiyun 	},
136*4882a593Smuzhiyun };
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun static struct platform_device *amlm5900_devices[] __initdata = {
139*4882a593Smuzhiyun #ifdef CONFIG_FB_S3C2410
140*4882a593Smuzhiyun 	&s3c_device_lcd,
141*4882a593Smuzhiyun #endif
142*4882a593Smuzhiyun 	&s3c_device_adc,
143*4882a593Smuzhiyun 	&s3c_device_wdt,
144*4882a593Smuzhiyun 	&s3c_device_i2c0,
145*4882a593Smuzhiyun 	&s3c_device_ohci,
146*4882a593Smuzhiyun  	&s3c_device_rtc,
147*4882a593Smuzhiyun 	&s3c_device_usbgadget,
148*4882a593Smuzhiyun         &s3c_device_sdi,
149*4882a593Smuzhiyun 	&amlm5900_device_nor,
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun 
amlm5900_map_io(void)152*4882a593Smuzhiyun static void __init amlm5900_map_io(void)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc));
155*4882a593Smuzhiyun 	s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs));
156*4882a593Smuzhiyun 	s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun 
amlm5900_init_time(void)159*4882a593Smuzhiyun static void __init amlm5900_init_time(void)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	s3c2410_init_clocks(12000000);
162*4882a593Smuzhiyun 	s3c24xx_timer_init();
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun #ifdef CONFIG_FB_S3C2410
166*4882a593Smuzhiyun static struct s3c2410fb_display __initdata amlm5900_lcd_info = {
167*4882a593Smuzhiyun 	.width		= 160,
168*4882a593Smuzhiyun 	.height		= 160,
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	.type		= S3C2410_LCDCON1_STN4,
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	.pixclock	= 680000, /* HCLK = 100MHz */
173*4882a593Smuzhiyun 	.xres		= 160,
174*4882a593Smuzhiyun 	.yres		= 160,
175*4882a593Smuzhiyun 	.bpp		= 4,
176*4882a593Smuzhiyun 	.left_margin	= 1 << (4 + 3),
177*4882a593Smuzhiyun 	.right_margin	= 8 << 3,
178*4882a593Smuzhiyun 	.hsync_len	= 48,
179*4882a593Smuzhiyun 	.upper_margin	= 0,
180*4882a593Smuzhiyun 	.lower_margin	= 0,
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	.lcdcon5	= 0x00000001,
183*4882a593Smuzhiyun };
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun static struct s3c2410fb_mach_info __initdata amlm5900_fb_info = {
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun 	.displays = &amlm5900_lcd_info,
188*4882a593Smuzhiyun 	.num_displays = 1,
189*4882a593Smuzhiyun 	.default_display = 0,
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	.gpccon =	0xaaaaaaaa,
192*4882a593Smuzhiyun 	.gpccon_mask =	0xffffffff,
193*4882a593Smuzhiyun 	.gpccon_reg =	S3C2410_GPCCON,
194*4882a593Smuzhiyun 	.gpcup =	0x0000ffff,
195*4882a593Smuzhiyun 	.gpcup_mask =	0xffffffff,
196*4882a593Smuzhiyun 	.gpcup_reg =	S3C2410_GPCUP,
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	.gpdcon =	0xaaaaaaaa,
199*4882a593Smuzhiyun 	.gpdcon_mask =	0xffffffff,
200*4882a593Smuzhiyun 	.gpdcon_reg =	S3C2410_GPDCON,
201*4882a593Smuzhiyun 	.gpdup =	0x0000ffff,
202*4882a593Smuzhiyun 	.gpdup_mask =	0xffffffff,
203*4882a593Smuzhiyun 	.gpdup_reg =	S3C2410_GPDUP,
204*4882a593Smuzhiyun };
205*4882a593Smuzhiyun #endif
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun static irqreturn_t
amlm5900_wake_interrupt(int irq,void * ignored)208*4882a593Smuzhiyun amlm5900_wake_interrupt(int irq, void *ignored)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	return IRQ_HANDLED;
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun 
amlm5900_init_pm(void)213*4882a593Smuzhiyun static void amlm5900_init_pm(void)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun 	int ret = 0;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	ret = request_irq(IRQ_EINT9, &amlm5900_wake_interrupt,
218*4882a593Smuzhiyun 				IRQF_TRIGGER_RISING | IRQF_SHARED,
219*4882a593Smuzhiyun 				"amlm5900_wakeup", &amlm5900_wake_interrupt);
220*4882a593Smuzhiyun 	if (ret != 0) {
221*4882a593Smuzhiyun 		printk(KERN_ERR "AML-M5900: no wakeup irq, %d?\n", ret);
222*4882a593Smuzhiyun 	} else {
223*4882a593Smuzhiyun 		enable_irq_wake(IRQ_EINT9);
224*4882a593Smuzhiyun 		/* configure the suspend/resume status pin */
225*4882a593Smuzhiyun 		s3c_gpio_cfgpin(S3C2410_GPF(2), S3C2410_GPIO_OUTPUT);
226*4882a593Smuzhiyun 		s3c_gpio_setpull(S3C2410_GPF(2), S3C_GPIO_PULL_UP);
227*4882a593Smuzhiyun 	}
228*4882a593Smuzhiyun }
amlm5900_init(void)229*4882a593Smuzhiyun static void __init amlm5900_init(void)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun 	amlm5900_init_pm();
232*4882a593Smuzhiyun #ifdef CONFIG_FB_S3C2410
233*4882a593Smuzhiyun 	s3c24xx_fb_set_platdata(&amlm5900_fb_info);
234*4882a593Smuzhiyun #endif
235*4882a593Smuzhiyun 	s3c_i2c0_set_platdata(NULL);
236*4882a593Smuzhiyun 	gpiod_add_lookup_table(&amlm5900_mmc_gpio_table);
237*4882a593Smuzhiyun 	platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices));
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun MACHINE_START(AML_M5900, "AML_M5900")
241*4882a593Smuzhiyun 	.atag_offset	= 0x100,
242*4882a593Smuzhiyun 	.map_io		= amlm5900_map_io,
243*4882a593Smuzhiyun 	.init_irq	= s3c2410_init_irq,
244*4882a593Smuzhiyun 	.init_machine	= amlm5900_init,
245*4882a593Smuzhiyun 	.init_time	= amlm5900_init_time,
246*4882a593Smuzhiyun MACHINE_END
247