1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright 2008 Openmoko, Inc.
4*4882a593Smuzhiyun // Copyright 2008 Simtec Electronics
5*4882a593Smuzhiyun // Ben Dooks <ben@simtec.co.uk>
6*4882a593Smuzhiyun // http://armlinux.simtec.co.uk/
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun // S3C64XX - Interrupt handling Power Management
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /*
11*4882a593Smuzhiyun * NOTE: Code in this file is not used when booting with Device Tree support.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/kernel.h>
15*4882a593Smuzhiyun #include <linux/syscore_ops.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/serial_core.h>
18*4882a593Smuzhiyun #include <linux/serial_s3c.h>
19*4882a593Smuzhiyun #include <linux/irq.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun #include <linux/of.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include "map.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include "regs-gpio.h"
26*4882a593Smuzhiyun #include "cpu.h"
27*4882a593Smuzhiyun #include "pm.h"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* We handled all the IRQ types in this code, to save having to make several
30*4882a593Smuzhiyun * small files to handle each different type separately. Having the EINT_GRP
31*4882a593Smuzhiyun * code here shouldn't be as much bloat as the IRQ table space needed when
32*4882a593Smuzhiyun * they are enabled. The added benefit is we ensure that these registers are
33*4882a593Smuzhiyun * in the same state as we suspended.
34*4882a593Smuzhiyun */
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun static struct sleep_save irq_save[] = {
37*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_PRIORITY),
38*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_EINT0CON0),
39*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_EINT0CON1),
40*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_EINT0FLTCON0),
41*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_EINT0FLTCON1),
42*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_EINT0FLTCON2),
43*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_EINT0FLTCON3),
44*4882a593Smuzhiyun SAVE_ITEM(S3C64XX_EINT0MASK),
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun static struct irq_grp_save {
48*4882a593Smuzhiyun u32 fltcon;
49*4882a593Smuzhiyun u32 con;
50*4882a593Smuzhiyun u32 mask;
51*4882a593Smuzhiyun } eint_grp_save[5];
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #ifndef CONFIG_SERIAL_SAMSUNG_UARTS
54*4882a593Smuzhiyun #define SERIAL_SAMSUNG_UARTS 0
55*4882a593Smuzhiyun #else
56*4882a593Smuzhiyun #define SERIAL_SAMSUNG_UARTS CONFIG_SERIAL_SAMSUNG_UARTS
57*4882a593Smuzhiyun #endif
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun static u32 irq_uart_mask[SERIAL_SAMSUNG_UARTS];
60*4882a593Smuzhiyun
s3c64xx_irq_pm_suspend(void)61*4882a593Smuzhiyun static int s3c64xx_irq_pm_suspend(void)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun struct irq_grp_save *grp = eint_grp_save;
64*4882a593Smuzhiyun int i;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun S3C_PMDBG("%s: suspending IRQs\n", __func__);
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
71*4882a593Smuzhiyun irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
74*4882a593Smuzhiyun grp->con = __raw_readl(S3C64XX_EINT12CON + (i * 4));
75*4882a593Smuzhiyun grp->mask = __raw_readl(S3C64XX_EINT12MASK + (i * 4));
76*4882a593Smuzhiyun grp->fltcon = __raw_readl(S3C64XX_EINT12FLTCON + (i * 4));
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun return 0;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
s3c64xx_irq_pm_resume(void)82*4882a593Smuzhiyun static void s3c64xx_irq_pm_resume(void)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun struct irq_grp_save *grp = eint_grp_save;
85*4882a593Smuzhiyun int i;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun S3C_PMDBG("%s: resuming IRQs\n", __func__);
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun for (i = 0; i < SERIAL_SAMSUNG_UARTS; i++)
92*4882a593Smuzhiyun __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
95*4882a593Smuzhiyun __raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
96*4882a593Smuzhiyun __raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
97*4882a593Smuzhiyun __raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun static struct syscore_ops s3c64xx_irq_syscore_ops = {
104*4882a593Smuzhiyun .suspend = s3c64xx_irq_pm_suspend,
105*4882a593Smuzhiyun .resume = s3c64xx_irq_pm_resume,
106*4882a593Smuzhiyun };
107*4882a593Smuzhiyun
s3c64xx_syscore_init(void)108*4882a593Smuzhiyun static __init int s3c64xx_syscore_init(void)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun /* Appropriate drivers (pinctrl, uart) handle this when using DT. */
111*4882a593Smuzhiyun if (of_have_populated_dt() || !soc_is_s3c64xx())
112*4882a593Smuzhiyun return 0;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun register_syscore_ops(&s3c64xx_irq_syscore_ops);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun return 0;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun core_initcall(s3c64xx_syscore_init);
120