1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2008 Simtec Electronics 4*4882a593Smuzhiyun * http://armlinux.simtec.co.uk/ 5*4882a593Smuzhiyun * Ben Dooks <ben@simtec.co.uk> 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * S3C2410 - GPIO lib support 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* some boards require extra gpio capacity to support external 11*4882a593Smuzhiyun * devices that need GPIO. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef GPIO_SAMSUNG_S3C24XX_H 15*4882a593Smuzhiyun #define GPIO_SAMSUNG_S3C24XX_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include "map.h" 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* 20*4882a593Smuzhiyun * GPIO sizes for various SoCs: 21*4882a593Smuzhiyun * 22*4882a593Smuzhiyun * 2410 2412 2440 2443 2416 23*4882a593Smuzhiyun * 2442 24*4882a593Smuzhiyun * ---- ---- ---- ---- ---- 25*4882a593Smuzhiyun * A 23 22 25 16 27 26*4882a593Smuzhiyun * B 11 11 11 11 11 27*4882a593Smuzhiyun * C 16 16 16 16 16 28*4882a593Smuzhiyun * D 16 16 16 16 16 29*4882a593Smuzhiyun * E 16 16 16 16 16 30*4882a593Smuzhiyun * F 8 8 8 8 8 31*4882a593Smuzhiyun * G 16 16 16 16 8 32*4882a593Smuzhiyun * H 11 11 11 15 15 33*4882a593Smuzhiyun * J -- -- 13 16 -- 34*4882a593Smuzhiyun * K -- -- -- -- 16 35*4882a593Smuzhiyun * L -- -- -- 15 14 36*4882a593Smuzhiyun * M -- -- -- 2 2 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* GPIO bank sizes */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define S3C2410_GPIO_A_NR (32) 42*4882a593Smuzhiyun #define S3C2410_GPIO_B_NR (32) 43*4882a593Smuzhiyun #define S3C2410_GPIO_C_NR (32) 44*4882a593Smuzhiyun #define S3C2410_GPIO_D_NR (32) 45*4882a593Smuzhiyun #define S3C2410_GPIO_E_NR (32) 46*4882a593Smuzhiyun #define S3C2410_GPIO_F_NR (32) 47*4882a593Smuzhiyun #define S3C2410_GPIO_G_NR (32) 48*4882a593Smuzhiyun #define S3C2410_GPIO_H_NR (32) 49*4882a593Smuzhiyun #define S3C2410_GPIO_J_NR (32) /* technically 16. */ 50*4882a593Smuzhiyun #define S3C2410_GPIO_K_NR (32) /* technically 16. */ 51*4882a593Smuzhiyun #define S3C2410_GPIO_L_NR (32) /* technically 15. */ 52*4882a593Smuzhiyun #define S3C2410_GPIO_M_NR (32) /* technically 2. */ 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #if CONFIG_S3C_GPIO_SPACE != 0 55*4882a593Smuzhiyun #error CONFIG_S3C_GPIO_SPACE cannot be nonzero at the moment 56*4882a593Smuzhiyun #endif 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define S3C2410_GPIO_NEXT(__gpio) \ 59*4882a593Smuzhiyun ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 0) 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #ifndef __ASSEMBLY__ 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun enum s3c_gpio_number { 64*4882a593Smuzhiyun S3C2410_GPIO_A_START = 0, 65*4882a593Smuzhiyun S3C2410_GPIO_B_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_A), 66*4882a593Smuzhiyun S3C2410_GPIO_C_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_B), 67*4882a593Smuzhiyun S3C2410_GPIO_D_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_C), 68*4882a593Smuzhiyun S3C2410_GPIO_E_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_D), 69*4882a593Smuzhiyun S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E), 70*4882a593Smuzhiyun S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F), 71*4882a593Smuzhiyun S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G), 72*4882a593Smuzhiyun S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H), 73*4882a593Smuzhiyun S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J), 74*4882a593Smuzhiyun S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K), 75*4882a593Smuzhiyun S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L), 76*4882a593Smuzhiyun }; 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */ 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* S3C2410 GPIO number definitions. */ 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun #define S3C2410_GPA(_nr) (S3C2410_GPIO_A_START + (_nr)) 83*4882a593Smuzhiyun #define S3C2410_GPB(_nr) (S3C2410_GPIO_B_START + (_nr)) 84*4882a593Smuzhiyun #define S3C2410_GPC(_nr) (S3C2410_GPIO_C_START + (_nr)) 85*4882a593Smuzhiyun #define S3C2410_GPD(_nr) (S3C2410_GPIO_D_START + (_nr)) 86*4882a593Smuzhiyun #define S3C2410_GPE(_nr) (S3C2410_GPIO_E_START + (_nr)) 87*4882a593Smuzhiyun #define S3C2410_GPF(_nr) (S3C2410_GPIO_F_START + (_nr)) 88*4882a593Smuzhiyun #define S3C2410_GPG(_nr) (S3C2410_GPIO_G_START + (_nr)) 89*4882a593Smuzhiyun #define S3C2410_GPH(_nr) (S3C2410_GPIO_H_START + (_nr)) 90*4882a593Smuzhiyun #define S3C2410_GPJ(_nr) (S3C2410_GPIO_J_START + (_nr)) 91*4882a593Smuzhiyun #define S3C2410_GPK(_nr) (S3C2410_GPIO_K_START + (_nr)) 92*4882a593Smuzhiyun #define S3C2410_GPL(_nr) (S3C2410_GPIO_L_START + (_nr)) 93*4882a593Smuzhiyun #define S3C2410_GPM(_nr) (S3C2410_GPIO_M_START + (_nr)) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #ifdef CONFIG_CPU_S3C244X 96*4882a593Smuzhiyun #define S3C_GPIO_END (S3C2410_GPJ(0) + 32) 97*4882a593Smuzhiyun #elif defined(CONFIG_CPU_S3C2443) || defined(CONFIG_CPU_S3C2416) 98*4882a593Smuzhiyun #define S3C_GPIO_END (S3C2410_GPM(0) + 32) 99*4882a593Smuzhiyun #else 100*4882a593Smuzhiyun #define S3C_GPIO_END (S3C2410_GPH(0) + 32) 101*4882a593Smuzhiyun #endif 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #endif /* GPIO_SAMSUNG_S3C24XX_H */ 104