1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright 2008 Openmoko, Inc.
4*4882a593Smuzhiyun * Copyright 2008 Simtec Electronics
5*4882a593Smuzhiyun * http://armlinux.simtec.co.uk/
6*4882a593Smuzhiyun * Ben Dooks <ben@simtec.co.uk>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * S3C Platform - GPIO pin configuration
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun /* This file contains the necessary definitions to get the basic gpio
12*4882a593Smuzhiyun * pin configuration done such as setting a pin to input or output or
13*4882a593Smuzhiyun * changing the pull-{up,down} configurations.
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /* Note, this interface is being added to the s3c64xx arch first and will
17*4882a593Smuzhiyun * be added to the s3c24xx systems later.
18*4882a593Smuzhiyun */
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #ifndef __PLAT_GPIO_CFG_H
21*4882a593Smuzhiyun #define __PLAT_GPIO_CFG_H __FILE__
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <linux/types.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun typedef unsigned int __bitwise samsung_gpio_pull_t;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* forward declaration if gpio-core.h hasn't been included */
28*4882a593Smuzhiyun struct samsung_gpio_chip;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /**
31*4882a593Smuzhiyun * struct samsung_gpio_cfg GPIO configuration
32*4882a593Smuzhiyun * @cfg_eint: Configuration setting when used for external interrupt source
33*4882a593Smuzhiyun * @get_pull: Read the current pull configuration for the GPIO
34*4882a593Smuzhiyun * @set_pull: Set the current pull configuration for the GPIO
35*4882a593Smuzhiyun * @set_config: Set the current configuration for the GPIO
36*4882a593Smuzhiyun * @get_config: Read the current configuration for the GPIO
37*4882a593Smuzhiyun *
38*4882a593Smuzhiyun * Each chip can have more than one type of GPIO bank available and some
39*4882a593Smuzhiyun * have different capabilites even when they have the same control register
40*4882a593Smuzhiyun * layouts. Provide an point to vector control routine and provide any
41*4882a593Smuzhiyun * per-bank configuration information that other systems such as the
42*4882a593Smuzhiyun * external interrupt code will need.
43*4882a593Smuzhiyun *
44*4882a593Smuzhiyun * @sa samsung_gpio_cfgpin
45*4882a593Smuzhiyun * @sa s3c_gpio_getcfg
46*4882a593Smuzhiyun * @sa s3c_gpio_setpull
47*4882a593Smuzhiyun * @sa s3c_gpio_getpull
48*4882a593Smuzhiyun */
49*4882a593Smuzhiyun struct samsung_gpio_cfg {
50*4882a593Smuzhiyun unsigned int cfg_eint;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun samsung_gpio_pull_t (*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
53*4882a593Smuzhiyun int (*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
54*4882a593Smuzhiyun samsung_gpio_pull_t pull);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
57*4882a593Smuzhiyun int (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
58*4882a593Smuzhiyun unsigned config);
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define S3C_GPIO_SPECIAL_MARK (0xfffffff0)
62*4882a593Smuzhiyun #define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x))
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* Defines for generic pin configurations */
65*4882a593Smuzhiyun #define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0))
66*4882a593Smuzhiyun #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
67*4882a593Smuzhiyun #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #define samsung_gpio_is_cfg_special(_cfg) \
70*4882a593Smuzhiyun (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /**
73*4882a593Smuzhiyun * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
74*4882a593Smuzhiyun * @pin pin The pin number to configure.
75*4882a593Smuzhiyun * @to to The configuration for the pin's function.
76*4882a593Smuzhiyun *
77*4882a593Smuzhiyun * Configure which function is actually connected to the external
78*4882a593Smuzhiyun * pin, such as an gpio input, output or some form of special function
79*4882a593Smuzhiyun * connected to an internal peripheral block.
80*4882a593Smuzhiyun *
81*4882a593Smuzhiyun * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
82*4882a593Smuzhiyun * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
83*4882a593Smuzhiyun * will then generate the correct bit mask and shift for the configuration.
84*4882a593Smuzhiyun *
85*4882a593Smuzhiyun * If a bank of GPIOs all needs to be set to special-function 2, then
86*4882a593Smuzhiyun * the following code will work:
87*4882a593Smuzhiyun *
88*4882a593Smuzhiyun * for (gpio = start; gpio < end; gpio++)
89*4882a593Smuzhiyun * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
90*4882a593Smuzhiyun *
91*4882a593Smuzhiyun * The @to parameter can also be a specific value already shifted to the
92*4882a593Smuzhiyun * correct position in the control register, although these are discouraged
93*4882a593Smuzhiyun * in newer kernels and are only being kept for compatibility.
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /**
98*4882a593Smuzhiyun * s3c_gpio_getcfg - Read the current function for a GPIO pin
99*4882a593Smuzhiyun * @pin: The pin to read the configuration value for.
100*4882a593Smuzhiyun *
101*4882a593Smuzhiyun * Read the configuration state of the given @pin, returning a value that
102*4882a593Smuzhiyun * could be passed back to s3c_gpio_cfgpin().
103*4882a593Smuzhiyun *
104*4882a593Smuzhiyun * @sa s3c_gpio_cfgpin
105*4882a593Smuzhiyun */
106*4882a593Smuzhiyun extern unsigned s3c_gpio_getcfg(unsigned int pin);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /**
109*4882a593Smuzhiyun * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
110*4882a593Smuzhiyun * @start: The pin number to start at
111*4882a593Smuzhiyun * @nr: The number of pins to configure from @start.
112*4882a593Smuzhiyun * @cfg: The configuration for the pin's function
113*4882a593Smuzhiyun *
114*4882a593Smuzhiyun * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
115*4882a593Smuzhiyun *
116*4882a593Smuzhiyun * @sa s3c_gpio_cfgpin.
117*4882a593Smuzhiyun */
118*4882a593Smuzhiyun extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
119*4882a593Smuzhiyun unsigned int cfg);
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* Define values for the pull-{up,down} available for each gpio pin.
122*4882a593Smuzhiyun *
123*4882a593Smuzhiyun * These values control the state of the weak pull-{up,down} resistors
124*4882a593Smuzhiyun * available on most pins on the S3C series. Not all chips support both
125*4882a593Smuzhiyun * up or down settings, and it may be dependent on the chip that is being
126*4882a593Smuzhiyun * used to whether the particular mode is available.
127*4882a593Smuzhiyun */
128*4882a593Smuzhiyun #define S3C_GPIO_PULL_NONE ((__force samsung_gpio_pull_t)0x00)
129*4882a593Smuzhiyun #define S3C_GPIO_PULL_DOWN ((__force samsung_gpio_pull_t)0x01)
130*4882a593Smuzhiyun #define S3C_GPIO_PULL_UP ((__force samsung_gpio_pull_t)0x02)
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /**
133*4882a593Smuzhiyun * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
134*4882a593Smuzhiyun * @pin: The pin number to configure the pull resistor.
135*4882a593Smuzhiyun * @pull: The configuration for the pull resistor.
136*4882a593Smuzhiyun *
137*4882a593Smuzhiyun * This function sets the state of the pull-{up,down} resistor for the
138*4882a593Smuzhiyun * specified pin. It will return 0 if successful, or a negative error
139*4882a593Smuzhiyun * code if the pin cannot support the requested pull setting.
140*4882a593Smuzhiyun *
141*4882a593Smuzhiyun * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
142*4882a593Smuzhiyun */
143*4882a593Smuzhiyun extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /**
146*4882a593Smuzhiyun * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
147*4882a593Smuzhiyun * @pin: The pin number to get the settings for
148*4882a593Smuzhiyun *
149*4882a593Smuzhiyun * Read the pull resistor value for the specified pin.
150*4882a593Smuzhiyun */
151*4882a593Smuzhiyun extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /* configure `all` aspects of an gpio */
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /**
156*4882a593Smuzhiyun * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
157*4882a593Smuzhiyun * @start: The gpio number to start at.
158*4882a593Smuzhiyun * @nr: The number of gpio to configure from @start.
159*4882a593Smuzhiyun * @cfg: The configuration to use
160*4882a593Smuzhiyun * @pull: The pull setting to use.
161*4882a593Smuzhiyun *
162*4882a593Smuzhiyun * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
163*4882a593Smuzhiyun * @gpio and running for @size.
164*4882a593Smuzhiyun *
165*4882a593Smuzhiyun * @sa s3c_gpio_cfgpin
166*4882a593Smuzhiyun * @sa s3c_gpio_setpull
167*4882a593Smuzhiyun * @sa s3c_gpio_cfgpin_range
168*4882a593Smuzhiyun */
169*4882a593Smuzhiyun extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
170*4882a593Smuzhiyun unsigned int cfg, samsung_gpio_pull_t pull);
171*4882a593Smuzhiyun
s3c_gpio_cfgrange_nopull(unsigned int pin,unsigned int size,unsigned int cfg)172*4882a593Smuzhiyun static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
173*4882a593Smuzhiyun unsigned int cfg)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun #endif /* __PLAT_GPIO_CFG_H */
179