1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* linux/arch/arm/mach-s3c6400/include/mach/dma.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright 2008 Openmoko, Inc. 5*4882a593Smuzhiyun * Copyright 2008 Simtec Electronics 6*4882a593Smuzhiyun * Ben Dooks <ben@simtec.co.uk> 7*4882a593Smuzhiyun * http://armlinux.simtec.co.uk/ 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * S3C6400 - DMA support 10*4882a593Smuzhiyun */ 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #ifndef __ASM_ARCH_DMA_H 13*4882a593Smuzhiyun #define __ASM_ARCH_DMA_H __FILE__ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define S3C64XX_DMA_CHAN(name) ((unsigned long)(name)) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun /* DMA0/SDMA0 */ 18*4882a593Smuzhiyun #define DMACH_UART0 "uart0_tx" 19*4882a593Smuzhiyun #define DMACH_UART0_SRC2 "uart0_rx" 20*4882a593Smuzhiyun #define DMACH_UART1 "uart1_tx" 21*4882a593Smuzhiyun #define DMACH_UART1_SRC2 "uart1_rx" 22*4882a593Smuzhiyun #define DMACH_UART2 "uart2_tx" 23*4882a593Smuzhiyun #define DMACH_UART2_SRC2 "uart2_rx" 24*4882a593Smuzhiyun #define DMACH_UART3 "uart3_tx" 25*4882a593Smuzhiyun #define DMACH_UART3_SRC2 "uart3_rx" 26*4882a593Smuzhiyun #define DMACH_PCM0_TX "pcm0_tx" 27*4882a593Smuzhiyun #define DMACH_PCM0_RX "pcm0_rx" 28*4882a593Smuzhiyun #define DMACH_I2S0_OUT "i2s0_tx" 29*4882a593Smuzhiyun #define DMACH_I2S0_IN "i2s0_rx" 30*4882a593Smuzhiyun #define DMACH_SPI0_TX S3C64XX_DMA_CHAN("spi0_tx") 31*4882a593Smuzhiyun #define DMACH_SPI0_RX S3C64XX_DMA_CHAN("spi0_rx") 32*4882a593Smuzhiyun #define DMACH_HSI_I2SV40_TX "i2s2_tx" 33*4882a593Smuzhiyun #define DMACH_HSI_I2SV40_RX "i2s2_rx" 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* DMA1/SDMA1 */ 36*4882a593Smuzhiyun #define DMACH_PCM1_TX "pcm1_tx" 37*4882a593Smuzhiyun #define DMACH_PCM1_RX "pcm1_rx" 38*4882a593Smuzhiyun #define DMACH_I2S1_OUT "i2s1_tx" 39*4882a593Smuzhiyun #define DMACH_I2S1_IN "i2s1_rx" 40*4882a593Smuzhiyun #define DMACH_SPI1_TX S3C64XX_DMA_CHAN("spi1_tx") 41*4882a593Smuzhiyun #define DMACH_SPI1_RX S3C64XX_DMA_CHAN("spi1_rx") 42*4882a593Smuzhiyun #define DMACH_AC97_PCMOUT "ac97_out" 43*4882a593Smuzhiyun #define DMACH_AC97_PCMIN "ac97_in" 44*4882a593Smuzhiyun #define DMACH_AC97_MICIN "ac97_mic" 45*4882a593Smuzhiyun #define DMACH_PWM "pwm" 46*4882a593Smuzhiyun #define DMACH_IRDA "irda" 47*4882a593Smuzhiyun #define DMACH_EXTERNAL "external" 48*4882a593Smuzhiyun #define DMACH_SECURITY_RX "sec_rx" 49*4882a593Smuzhiyun #define DMACH_SECURITY_TX "sec_tx" 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun enum dma_ch { 52*4882a593Smuzhiyun DMACH_MAX = 32 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #include <linux/amba/pl08x.h> 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #endif /* __ASM_ARCH_IRQ_H */ 58