1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyunconfig ARCH_ROCKCHIP 3*4882a593Smuzhiyun bool "Rockchip RK2928 and RK3xxx SOCs" 4*4882a593Smuzhiyun depends on ARCH_MULTI_V7 5*4882a593Smuzhiyun select PINCTRL 6*4882a593Smuzhiyun select PINCTRL_ROCKCHIP 7*4882a593Smuzhiyun select ARCH_HAS_RESET_CONTROLLER 8*4882a593Smuzhiyun select ARM_AMBA 9*4882a593Smuzhiyun select ARM_GIC 10*4882a593Smuzhiyun select CACHE_L2X0 if (CPU_RK30XX || CPU_RK3188) 11*4882a593Smuzhiyun select GPIOLIB 12*4882a593Smuzhiyun select HAVE_ARM_ARCH_TIMER 13*4882a593Smuzhiyun select HAVE_ARM_SCU if SMP 14*4882a593Smuzhiyun select HAVE_ARM_TWD if SMP && (CPU_RK30XX || CPU_RK3188) 15*4882a593Smuzhiyun select DW_APB_TIMER_OF if CPU_RK30XX 16*4882a593Smuzhiyun select REGULATOR if PM 17*4882a593Smuzhiyun select ROCKCHIP_TIMER 18*4882a593Smuzhiyun select ARM_GLOBAL_TIMER if (CPU_RK30XX || CPU_RK3188) 19*4882a593Smuzhiyun select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK if (CPU_RK30XX || CPU_RK3188) 20*4882a593Smuzhiyun select ZONE_DMA if ARM_LPAE 21*4882a593Smuzhiyun select PM 22*4882a593Smuzhiyun help 23*4882a593Smuzhiyun Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs 24*4882a593Smuzhiyun containing the RK2928, RK30xx and RK31xx series. 25