xref: /OK3568_Linux_fs/kernel/arch/arm/mach-realview/platsmp-dt.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2015 Linus Walleij
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #include <linux/smp.h>
6*4882a593Smuzhiyun #include <linux/io.h>
7*4882a593Smuzhiyun #include <linux/of.h>
8*4882a593Smuzhiyun #include <linux/of_address.h>
9*4882a593Smuzhiyun #include <linux/regmap.h>
10*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #include <asm/cacheflush.h>
13*4882a593Smuzhiyun #include <asm/smp_plat.h>
14*4882a593Smuzhiyun #include <asm/smp_scu.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <plat/platsmp.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define REALVIEW_SYS_FLAGSSET_OFFSET	0x30
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun static const struct of_device_id realview_scu_match[] = {
21*4882a593Smuzhiyun 	{ .compatible = "arm,arm11mp-scu", },
22*4882a593Smuzhiyun 	{ .compatible = "arm,cortex-a9-scu", },
23*4882a593Smuzhiyun 	{ .compatible = "arm,cortex-a5-scu", },
24*4882a593Smuzhiyun 	{ }
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static const struct of_device_id realview_syscon_match[] = {
28*4882a593Smuzhiyun         { .compatible = "arm,core-module-integrator", },
29*4882a593Smuzhiyun         { .compatible = "arm,realview-eb-syscon", },
30*4882a593Smuzhiyun         { .compatible = "arm,realview-pb11mp-syscon", },
31*4882a593Smuzhiyun         { .compatible = "arm,realview-pbx-syscon", },
32*4882a593Smuzhiyun         { },
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun 
realview_smp_prepare_cpus(unsigned int max_cpus)35*4882a593Smuzhiyun static void __init realview_smp_prepare_cpus(unsigned int max_cpus)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	struct device_node *np;
38*4882a593Smuzhiyun 	void __iomem *scu_base;
39*4882a593Smuzhiyun 	struct regmap *map;
40*4882a593Smuzhiyun 	unsigned int ncores;
41*4882a593Smuzhiyun 	int i;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	np = of_find_matching_node(NULL, realview_scu_match);
44*4882a593Smuzhiyun 	if (!np) {
45*4882a593Smuzhiyun 		pr_err("PLATSMP: No SCU base address\n");
46*4882a593Smuzhiyun 		return;
47*4882a593Smuzhiyun 	}
48*4882a593Smuzhiyun 	scu_base = of_iomap(np, 0);
49*4882a593Smuzhiyun 	of_node_put(np);
50*4882a593Smuzhiyun 	if (!scu_base) {
51*4882a593Smuzhiyun 		pr_err("PLATSMP: No SCU remap\n");
52*4882a593Smuzhiyun 		return;
53*4882a593Smuzhiyun 	}
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	scu_enable(scu_base);
56*4882a593Smuzhiyun 	ncores = scu_get_core_count(scu_base);
57*4882a593Smuzhiyun 	pr_info("SCU: %d cores detected\n", ncores);
58*4882a593Smuzhiyun 	for (i = 0; i < ncores; i++)
59*4882a593Smuzhiyun 		set_cpu_possible(i, true);
60*4882a593Smuzhiyun 	iounmap(scu_base);
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	/* The syscon contains the magic SMP start address registers */
63*4882a593Smuzhiyun 	np = of_find_matching_node(NULL, realview_syscon_match);
64*4882a593Smuzhiyun 	if (!np) {
65*4882a593Smuzhiyun 		pr_err("PLATSMP: No syscon match\n");
66*4882a593Smuzhiyun 		return;
67*4882a593Smuzhiyun 	}
68*4882a593Smuzhiyun 	map = syscon_node_to_regmap(np);
69*4882a593Smuzhiyun 	if (IS_ERR(map)) {
70*4882a593Smuzhiyun 		pr_err("PLATSMP: No syscon regmap\n");
71*4882a593Smuzhiyun 		return;
72*4882a593Smuzhiyun 	}
73*4882a593Smuzhiyun 	/* Put the boot address in this magic register */
74*4882a593Smuzhiyun 	regmap_write(map, REALVIEW_SYS_FLAGSSET_OFFSET,
75*4882a593Smuzhiyun 		     __pa_symbol(versatile_secondary_startup));
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun #ifdef CONFIG_HOTPLUG_CPU
realview_cpu_die(unsigned int cpu)79*4882a593Smuzhiyun static void realview_cpu_die(unsigned int cpu)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	return versatile_immitation_cpu_die(cpu, 0x20);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun #endif
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun static const struct smp_operations realview_dt_smp_ops __initconst = {
86*4882a593Smuzhiyun 	.smp_prepare_cpus	= realview_smp_prepare_cpus,
87*4882a593Smuzhiyun 	.smp_secondary_init	= versatile_secondary_init,
88*4882a593Smuzhiyun 	.smp_boot_secondary	= versatile_boot_secondary,
89*4882a593Smuzhiyun #ifdef CONFIG_HOTPLUG_CPU
90*4882a593Smuzhiyun 	.cpu_die		= realview_cpu_die,
91*4882a593Smuzhiyun #endif
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun CPU_METHOD_OF_DECLARE(realview_smp, "arm,realview-smp", &realview_dt_smp_ops);
94