1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __ASM_ARCH_ZYLONITE_H 3*4882a593Smuzhiyun #define __ASM_ARCH_ZYLONITE_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define ZYLONITE_ETH_PHYS 0x14000000 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define EXT_GPIO(x) (128 + (x)) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define ZYLONITE_NR_IRQS (IRQ_BOARD_START + 32) 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* the following variables are processor specific and initialized 12*4882a593Smuzhiyun * by the corresponding zylonite_pxa3xx_init() 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun extern int gpio_eth_irq; 15*4882a593Smuzhiyun extern int gpio_debug_led1; 16*4882a593Smuzhiyun extern int gpio_debug_led2; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun extern int wm9713_irq; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun extern int lcd_id; 21*4882a593Smuzhiyun extern int lcd_orientation; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #ifdef CONFIG_MACH_ZYLONITE300 24*4882a593Smuzhiyun extern void zylonite_pxa300_init(void); 25*4882a593Smuzhiyun #else zylonite_pxa300_init(void)26*4882a593Smuzhiyunstatic inline void zylonite_pxa300_init(void) 27*4882a593Smuzhiyun { 28*4882a593Smuzhiyun if (cpu_is_pxa300() || cpu_is_pxa310()) 29*4882a593Smuzhiyun panic("%s: PXA300/PXA310 not supported\n", __func__); 30*4882a593Smuzhiyun } 31*4882a593Smuzhiyun #endif 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun #ifdef CONFIG_MACH_ZYLONITE320 34*4882a593Smuzhiyun extern void zylonite_pxa320_init(void); 35*4882a593Smuzhiyun #else zylonite_pxa320_init(void)36*4882a593Smuzhiyunstatic inline void zylonite_pxa320_init(void) 37*4882a593Smuzhiyun { 38*4882a593Smuzhiyun if (cpu_is_pxa320()) 39*4882a593Smuzhiyun panic("%s: PXA320 not supported\n", __func__); 40*4882a593Smuzhiyun } 41*4882a593Smuzhiyun #endif 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #endif /* __ASM_ARCH_ZYLONITE_H */ 44