xref: /OK3568_Linux_fs/kernel/arch/arm/mach-pxa/xcep.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*  linux/arch/arm/mach-pxa/xcep.c
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *  Support for the Iskratel Electronics XCEP platform as used in
5*4882a593Smuzhiyun  *  the Libera instruments from Instrumentation Technologies.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *  Author:     Ales Bardorfer <ales@i-tech.si>
8*4882a593Smuzhiyun  *  Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk>
9*4882a593Smuzhiyun  *  Contributions by: Matej Kenda <matej.kenda@i-tech.si>
10*4882a593Smuzhiyun  *  Created:    June 2006
11*4882a593Smuzhiyun  *  Copyright:  (C) 2006-2009 Instrumentation Technologies
12*4882a593Smuzhiyun  */
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/i2c.h>
16*4882a593Smuzhiyun #include <linux/platform_data/i2c-pxa.h>
17*4882a593Smuzhiyun #include <linux/smc91x.h>
18*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
19*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
20*4882a593Smuzhiyun #include <linux/mtd/physmap.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <asm/mach-types.h>
23*4882a593Smuzhiyun #include <asm/mach/arch.h>
24*4882a593Smuzhiyun #include <asm/mach/irq.h>
25*4882a593Smuzhiyun #include <asm/mach/map.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <mach/hardware.h>
28*4882a593Smuzhiyun #include "pxa25x.h"
29*4882a593Smuzhiyun #include <mach/smemc.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #include "generic.h"
32*4882a593Smuzhiyun #include "devices.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define XCEP_ETH_PHYS		(PXA_CS3_PHYS + 0x00000300)
35*4882a593Smuzhiyun #define XCEP_ETH_PHYS_END	(PXA_CS3_PHYS + 0x000fffff)
36*4882a593Smuzhiyun #define XCEP_ETH_ATTR		(PXA_CS3_PHYS + 0x02000000)
37*4882a593Smuzhiyun #define XCEP_ETH_ATTR_END	(PXA_CS3_PHYS + 0x020fffff)
38*4882a593Smuzhiyun #define XCEP_ETH_IRQ		IRQ_GPIO0
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /*  XCEP CPLD base */
41*4882a593Smuzhiyun #define XCEP_CPLD_BASE		0xf0000000
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* Flash partitions. */
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun static struct mtd_partition xcep_partitions[] = {
47*4882a593Smuzhiyun 	{
48*4882a593Smuzhiyun 		.name =		"Bootloader",
49*4882a593Smuzhiyun 		.size =		0x00040000,
50*4882a593Smuzhiyun 		.offset =	0,
51*4882a593Smuzhiyun 		.mask_flags =	MTD_WRITEABLE
52*4882a593Smuzhiyun 	}, {
53*4882a593Smuzhiyun 		.name =		"Bootloader ENV",
54*4882a593Smuzhiyun 		.size =		0x00040000,
55*4882a593Smuzhiyun 		.offset =	0x00040000,
56*4882a593Smuzhiyun 		.mask_flags =	MTD_WRITEABLE
57*4882a593Smuzhiyun 	}, {
58*4882a593Smuzhiyun 		.name =		"Kernel",
59*4882a593Smuzhiyun 		.size =		0x00100000,
60*4882a593Smuzhiyun 		.offset =	0x00080000,
61*4882a593Smuzhiyun 	}, {
62*4882a593Smuzhiyun 		.name =		"Rescue fs",
63*4882a593Smuzhiyun 		.size =		0x00280000,
64*4882a593Smuzhiyun 		.offset =	0x00180000,
65*4882a593Smuzhiyun 	}, {
66*4882a593Smuzhiyun 		.name =		"Filesystem",
67*4882a593Smuzhiyun 		.size =		MTDPART_SIZ_FULL,
68*4882a593Smuzhiyun 		.offset =	0x00400000
69*4882a593Smuzhiyun 	}
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun static struct physmap_flash_data xcep_flash_data[] = {
73*4882a593Smuzhiyun 	{
74*4882a593Smuzhiyun 		.width		= 4,		/* bankwidth in bytes */
75*4882a593Smuzhiyun 		.parts		= xcep_partitions,
76*4882a593Smuzhiyun 		.nr_parts	= ARRAY_SIZE(xcep_partitions)
77*4882a593Smuzhiyun 	}
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static struct resource flash_resource = {
81*4882a593Smuzhiyun 	.start	= PXA_CS0_PHYS,
82*4882a593Smuzhiyun 	.end	= PXA_CS0_PHYS + SZ_32M - 1,
83*4882a593Smuzhiyun 	.flags	= IORESOURCE_MEM,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun static struct platform_device flash_device = {
87*4882a593Smuzhiyun 	.name	= "physmap-flash",
88*4882a593Smuzhiyun 	.id	= 0,
89*4882a593Smuzhiyun 	.dev 	= {
90*4882a593Smuzhiyun 		.platform_data = xcep_flash_data,
91*4882a593Smuzhiyun 	},
92*4882a593Smuzhiyun 	.resource = &flash_resource,
93*4882a593Smuzhiyun 	.num_resources = 1,
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun /* SMC LAN91C111 network controller. */
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun static struct resource smc91x_resources[] = {
101*4882a593Smuzhiyun 	[0] = {
102*4882a593Smuzhiyun 		.name	= "smc91x-regs",
103*4882a593Smuzhiyun 		.start	= XCEP_ETH_PHYS,
104*4882a593Smuzhiyun 		.end	= XCEP_ETH_PHYS_END,
105*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
106*4882a593Smuzhiyun 	},
107*4882a593Smuzhiyun 	[1] = {
108*4882a593Smuzhiyun 		.start	= XCEP_ETH_IRQ,
109*4882a593Smuzhiyun 		.end	= XCEP_ETH_IRQ,
110*4882a593Smuzhiyun 		.flags	= IORESOURCE_IRQ,
111*4882a593Smuzhiyun 	},
112*4882a593Smuzhiyun 	[2] = {
113*4882a593Smuzhiyun 		.name	= "smc91x-attrib",
114*4882a593Smuzhiyun 		.start	= XCEP_ETH_ATTR,
115*4882a593Smuzhiyun 		.end	= XCEP_ETH_ATTR_END,
116*4882a593Smuzhiyun 		.flags	= IORESOURCE_MEM,
117*4882a593Smuzhiyun 	},
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun static struct smc91x_platdata xcep_smc91x_info = {
121*4882a593Smuzhiyun 	.flags	= SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
122*4882a593Smuzhiyun 		  SMC91X_NOWAIT | SMC91X_USE_DMA,
123*4882a593Smuzhiyun };
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun static struct platform_device smc91x_device = {
126*4882a593Smuzhiyun 	.name		= "smc91x",
127*4882a593Smuzhiyun 	.id		= -1,
128*4882a593Smuzhiyun 	.num_resources	= ARRAY_SIZE(smc91x_resources),
129*4882a593Smuzhiyun 	.resource	= smc91x_resources,
130*4882a593Smuzhiyun 	.dev		= {
131*4882a593Smuzhiyun 		.platform_data = &xcep_smc91x_info,
132*4882a593Smuzhiyun 	},
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun static struct platform_device *devices[] __initdata = {
137*4882a593Smuzhiyun 	&flash_device,
138*4882a593Smuzhiyun 	&smc91x_device,
139*4882a593Smuzhiyun };
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun /* We have to state that there are HWMON devices on the I2C bus on XCEP.
143*4882a593Smuzhiyun  * Drivers for HWMON verify capabilities of the adapter when loading and
144*4882a593Smuzhiyun  * refuse to attach if the adapter doesn't support HWMON class of devices. */
145*4882a593Smuzhiyun static struct i2c_pxa_platform_data xcep_i2c_platform_data  = {
146*4882a593Smuzhiyun 	.class = I2C_CLASS_HWMON
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun static mfp_cfg_t xcep_pin_config[] __initdata = {
151*4882a593Smuzhiyun 	GPIO79_nCS_3,	/* SMC 91C111 chip select. */
152*4882a593Smuzhiyun 	GPIO80_nCS_4,	/* CPLD chip select. */
153*4882a593Smuzhiyun 	/* SSP communication to MSP430 */
154*4882a593Smuzhiyun 	GPIO23_SSP1_SCLK,
155*4882a593Smuzhiyun 	GPIO24_SSP1_SFRM,
156*4882a593Smuzhiyun 	GPIO25_SSP1_TXD,
157*4882a593Smuzhiyun 	GPIO26_SSP1_RXD,
158*4882a593Smuzhiyun 	GPIO27_SSP1_EXTCLK
159*4882a593Smuzhiyun };
160*4882a593Smuzhiyun 
xcep_init(void)161*4882a593Smuzhiyun static void __init xcep_init(void)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	pxa_set_ffuart_info(NULL);
166*4882a593Smuzhiyun 	pxa_set_btuart_info(NULL);
167*4882a593Smuzhiyun 	pxa_set_stuart_info(NULL);
168*4882a593Smuzhiyun 	pxa_set_hwuart_info(NULL);
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	/* See Intel XScale Developer's Guide for details */
171*4882a593Smuzhiyun 	/* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
172*4882a593Smuzhiyun 	__raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
173*4882a593Smuzhiyun 	/* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
174*4882a593Smuzhiyun 	__raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	platform_add_devices(ARRAY_AND_SIZE(devices));
177*4882a593Smuzhiyun 	pxa_set_i2c_info(&xcep_i2c_platform_data);
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun MACHINE_START(XCEP, "Iskratel XCEP")
181*4882a593Smuzhiyun 	.atag_offset	= 0x100,
182*4882a593Smuzhiyun 	.init_machine	= xcep_init,
183*4882a593Smuzhiyun 	.map_io		= pxa25x_map_io,
184*4882a593Smuzhiyun 	.nr_irqs	= PXA_NR_IRQS,
185*4882a593Smuzhiyun 	.init_irq	= pxa25x_init_irq,
186*4882a593Smuzhiyun 	.handle_irq	= pxa25x_handle_irq,
187*4882a593Smuzhiyun 	.init_time	= pxa_timer_init,
188*4882a593Smuzhiyun 	.restart	= pxa_restart,
189*4882a593Smuzhiyun MACHINE_END
190*4882a593Smuzhiyun 
191